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Room-temperature electronics + per-qubit coax/flex ct_rt

One coherent line per drive, flux and readout port runs from room-temperature racks through attenuated coax or flex cable into the mixing chamber.

Room-temperature electronics + per-qubit coax/flex

ct_rt · layer 5 Control · demonstrated · since 2007

One rf line per qubit through the fridge; the I/O wall: > 4,000 rf lines (KIDE), 1,121 qubits (Condor).

Brief →

Key references

[522] S. Krinner et al., “Engineering cryogenic setups for 100-qubit scale superconducting circu… · 2019
[292] J. Gambetta, “The hardware and software for the era of quantum utility is here,” IBM Quant… · 2023
[523] Physics World (IOP Publishing), “Delft Circuits, Bluefors: the engine-room driving joined-… · 2025
[303] Bluefors, “KIDE Cryogenic Platform — For Large-Scale Quantum Computing,” Jun. 16, 2026. [O… · 2026
[1] Google Quantum AI and Collaborators, “Quantum error correction below the surface code thre… · 2024

Design space — attributes

(a) carrier affinity
fabricated
(b) time · entangling
—
(c) readout
—
(d) mobility
—
(e) control
microwave @ room temperature
(f) error structure
coherent / calibration
(g) manufacturing
superconducting lithography

Evaluation space — dated attributes

I/O wall → > 4,000 high-density rf lines per fridge
defines: scaling path · 2026 · source
largest single-fridge chip → 1,121 qubits (Condor)
defines: count with quality · 2023-12 · source

Standard records

feed-forward latency → 63 µs · typical
Google Willow d=5: 'average decoder latency of 63 us ... with a cycle time of 1.1 us'; Fig. 4c gives 63 +/- 17 us · 2024-08 · source [D] ⓘ
feed-forward latency → 9.6 µs · best
Rigetti Ankaa-2 + FPGA decoder: '9.6 us' total response over 9 rounds = 6.5 us decoding + 3.1 us communication and control · 2024-10 · source [D] ⓘ
control lines per qubit → 4 · typical
Bluefors KIDE: 'over 4 000 RF lines' and 'supports more than 1000 qubits', i.e. ~4 RF lines per qubit at rated capacity · 2026-09 · source [C] ⓘ
recalibration interval → 43200 s · typical
VTT/IQM superconducting QPUs are calibrated 'twice a day at 00:45 UTC and 14:15 UTC' (frequency, amplitude, readout, CZ, RB) · 2026-09 · source [C] ⓘ

Used by 89 machines (82 primary · 7 alternate)

↗ its register card · paper / product / press: links that name the machine (attribution checked on 20 Sep 2026)

Pictures

Every picture carries the story of what it shows and its credit line.

Fig. 1 — Figure 1: Schematic of the experimental setup. The double quantum dot, located at the 60 mK stage, is coupled to an RF-reflectometry circuit for fas…
A drawn block schematic of a cryogenic measurement set-up across three stages (300 K, 4 K, 60 mK), with two real images: a scanning-electron micrograph of the gate electrodes of a silicon double quantum dot and an optical image of its chip, the imaged area boxed in orange. It is Fig. 1 of arXiv 2608.10325 (August 2026) by Johnathan Bryan, Tim J. Wilson and Hong-Wen Jiang, on real-time FPGA-based (field-programmable gate array) feedback stabilization of a silicon double quantum dot. Radio-frequency reflectometry reads the dot's charge state quickly; a Quantum Machines OPX controller runs a proportional-integral-derivative (PID) loop that corrects gate voltages in real time against drift. “Fig. 1 — Figure 1: Schematic of the experimental setup. The double quantum dot, located at the 60 mK stage, is coupled to an RF-reflectometry circuit for fast…” by Johnathan Bryan, Tim J. Wilson, Hong-Wen Jiang, arxiv.org/abs/2608.10325, CC BY 4.0 (creativecommons.org/licenses/by/4.0/)
File:Dilution Fridge with Quantum Processors Enclosed 16K Resolution.png
Computer render, not a photograph, of a dilution refrigerator's interior within see-through shields: six stacked plates (two dark, four gold-plated cold stages) joined by thin rods; about eight bundles of ribbon-like flexible cables with gold connectors running down through every plate; a central column with coils and copper links; and two square processor chips on gold holders at the bottom. Made by OJB Quantum as own work, published on Wikimedia Commons, dated 11 October 2025; the title gives 16K resolution. It illustrates how dense flex cabling carries control and readout lines from room temperature down to the quantum chips; it is an idealised drawing, not a real machine. “Dilution Fridge with Quantum Processors Enclosed 16K Resolution” by OJB Quantum, commons.wikimedia.org/wiki/File:Dilution_Fridge_with_Quantum…, CC BY 4.0 (creativecommons.org/licenses/by/4.0/)
Fig. 1 — Fig. 1: Integration of a hardware decoder into a control system.a Sketch of the Ankaa-2 quantum processing unit (QPU) and control system architectur…
Figure on running an error-correction decoder in real time inside the control system of a superconducting quantum computer. A drawn block diagram of the Rigetti control system shows gate and readout sequencers and a Riverlane real-time decoder within field-programmable gate array (FPGA) boundaries, with each delay marked, such as about 500 ns between sending and receiving a readout pulse. Beside it are a photograph of a dilution-refrigerator insert with a magnified view labelled QPU (quantum processing unit) and a map of qubits Q28–Q60 with a highlighted three-by-three block. From Caune et al., Nature Communications 2026, on the Ankaa-2 processor. It shows where the decoder sits and how fast results travel. “Fig. 1 — Fig. 1: Integration of a hardware decoder into a control system.a Sketch of the Ankaa-2 quantum processing unit (QPU) and control system architecture with the…” by Caune et al., www.nature.com/articles/s41467-026-73331-6, CC BY 4.0 (creativecommons.org/licenses/by/4.0/)
ct_rt · layer 5 Control · centrality 9.4 · demonstrated · since 2007 · updated 2026-09-30

Room-temperature electronics + per-qubit coax/flex

One coherent line per drive, flux and readout port runs from room-temperature racks through attenuated coax or flex cable into the mixing chamber.

Verdict. Line count and mixing-chamber heat, not gate physics, cap qubits per fridge; falsifiable if one fridge runs >2,000 qubits on RT lines.

Key references

Λ = error-suppression factor per code-distance step; QBI = DARPA Quantum Benchmarking Initiative (Stage A concept → B R&D plan → C government V&V); G1–G7 = the report's goal classes (see Actors & economics).

Identity & lineage

The incumbent control architecture for essentially every gate-model superconducting qubit: microwave drive, flux bias and readout tones synthesised at room temperature, carried down the dilution refrigerator on coax or flex cable, attenuated at each stage, reaching the chip at 10–20 mK. Every control degree of freedom is a conductor crossing a 300 K → 10 mK gradient — a thermal and mechanical problem, not a quantum one. In use since the first transmon setups (2007). Attributes: e = microwave control placed entirely at room temperature, no cryogenic amplification or demultiplexing; f = coherent error as the code sees it — crosstalk, phase noise, amplitude drift.

Physics & limits

The binding constraint is the cooling budget, not coherence. Each line carries a passive conduction load plus an active load from the ~60 dB of attenuation that brings 300 K Johnson noise down to the 10 mK photon floor, most of it dumped at 4 K and the still. Cooling power per stage is fixed — a Bluefors XLD400 gives roughly 1 W at 4 K, microwatts at the mixing chamber — so lines scale O(N) against a constant. Krinner et al.'s measured budget supports 50 qubits at 14 mK in that fridge, about 150 at most D[522]; every gain since is thinner cable and denser packing, not new physics. Failure is coherent — crosstalk and phase drift appear as control error, so these machines degrade by needing recalibration rather than by decohering. What moves the floor: multiplexing qubits per conductor, or moving synthesis into the fridge.

Engineering state of the art

table
Year Figure Who Tag+key
2019 50 qubits per XLD400 measured; ~150 thermal upper bound ETH Zürich D[522]
2023-12 1,121 qubits on one fridge (Condor), largest ever wired this way IBM C[292]
2025-11-10 8 channels per flex, +50% per port, 1,536 lines per XLDsl Delft Circuits C[523]
2026-06-16 KIDE specified at >4,000 rf lines, >1,000 qubits Bluefors C[303]

Wiring sets the N at which errors are worth correcting, not the floor: the dominant term is still two-qubit infidelity — Willow, 105 qubits at 99.88% mean 2Q, 1.1 µs cycle D[1].

Manufacturing, materials & supply chain

Yield here is mechanical (connectors per port, flex delamination, thermal anchoring) and thermal, not lithographic; racks are near-COTS. Cryogenic wiring is the thin layer — Delft Circuits is the leading independent flex supplier and ships inside Bluefors systems C[523]. Refrigerators concentrate the risk: Bluefors absorbed Cryomech's pulse tubes and helium plants in 2023, taking the stage beneath the dilution unit in-house at combined revenue above EUR 160 M C[524]; Oxford Instruments is the only comparable merchant alternative, ULVAC a Japanese third source since 2025 C[525]. Export control cuts asymmetrically: refrigerators past the BIS threshold (≥600 µW at 0.1 K, 48 h) fall under ECCN 3A904, and 3A901.a controls CMOS designed to run at ≤4.5 K — catching the cryo-CMOS alternative — while RT racks are uncontrolled G[301].

Control, readout & I/O burden

Two to four lines per qubit: drive, flux, and readout feedlines multiplexing 5–10 qubits each. At 10³ the architecture works and fills most of a large fridge; KIDE's >4,000 lines is specified for >1,000 qubits, about four each C[303]. At 10⁴ the flex roadmap (40,000+ lines by 2029) is a projection with no interim demonstration R[523], and multiplexing depth rather than cable count becomes the limit. At 10⁶ no RT path exists; every roadmap past ~10⁴ assumes in-fridge control or multi-fridge partitioning. The RT round trip also adds cable delay plus rack processing at µs scale C[526] against Willow's 1.1 µs cycle D[1].

Role in the stack

Serves the transmon, bosonic cat/GKP and dual-rail erasure architectures — the whole superconducting tree — and requires nothing upstream, its commercial strength. It is also the alternate control of the silicon/germanium quantum-dot, silicon-donor and colour-centre spin architectures. Its substitutes (4 K cryo-CMOS, millikelvin SFQ, on-chip flux DACs) each cost a fresh cryogenic qualification burden, and none has displaced it at scale: SEEQC's millikelvin SFQ module reaches 1Q fidelity above 99% and up to 99.9% on five qubits D[304]; HRL's 4 K controller runs 18 silicon spin qubits at Λ₅/₃ = 4.7 D[190]; IBM reports cryo-CMOS flux ASICs at parity with RT electronics on a 156-qubit Heron R2, but as conference abstracts only C[527]. RT wiring adds no gate or readout time, so the derived round stays 0.65 µs, inside the measured 1.1 µs QEC cycle D[1]. Neighbouring empty slot: a multiplexed cryogenic control layer proven at array scale.

Evidence — how the numbers were measured

Every line count above 1,536 is product literature, not a wired system: Bluefors' >4,000 and Delft Circuits' 40,000-by-2029 have no named installation, and neither publishes crosstalk or phase-stability data at high channel count. No independent measurement of aggregate crosstalk above ~1,000 simultaneous lines exists as of 4 Sep 2026 — the gap that matters, since crosstalk is how this architecture fails.

The qubit itself can measure the control chain's noise. On one Jülich transmon line with 56 dB of attenuation, the modelled excitation rate was dominated by classical noise from the room-temperature drive instrument (−146 dBm/Hz above 4.6 GHz) and from the 1 K attenuator stage, while relaxation was set by quantum noise; the qubit's excitation spectrum served as an in-situ spectrometer of that noise P[890]. The result describes one set-up, not every line.

Bluefors' >4,000-line and Delft Circuits' 40,000-by-2029 figures are not demonstrated at system level. IBM's cryo-CMOS flux-bias parity result exists only as APS conference abstracts, with no preprint or paper as of 2026-09-04. No dated ECCN determination covers RT control racks; their uncontrolled status is read from the absence of a matching entry in the 2024 rule, not from an explicit BIS statement. Not published: a per-line or per-loom cost, and the revenue and customer counts of Delft Circuits and Zurich Instruments.

Actors & economics

Who.
| Organisation | Role | Country | What exactly they do with this technology | Evidence |
|---|---|---|---|---|
| Bluefors | supplier | Finland | Refrigerators with integrated looms; KIDE at >4,000 lines | C[303] |
| Delft Circuits | supplier | Netherlands | Cri/oFlex ribbon, 8 channels per flex, inside Bluefors XLDsl | C[523] |
| Quantum Machines | supplier | Israel | OPX control racks and controller software | C[528] |
| Zurich Instruments | supplier | Switzerland | ZQCS racks on Fujitsu/RIKEN's 256-qubit system | C[526] |
| Qblox | supplier | Netherlands | Modular control stacks, lower price point | C[529] |
| IBM | developer | USA | Condor, 1,121 qubits on one fridge; cryo-CMOS challenger | C[292] |
| SEEQC | developer | USA | Millikelvin SFQ control, an in-fridge alternative | D[304] |

Money.
2023-03-28 · Bluefors · M&A, Cryomech · undisclosed, combined revenue > EUR 160 M · closed C[524]
2024-06-20 · Qblox · Series A · USD 26 M · Quantonation, Invest-NL Deep Tech · closed C[529]
2025-02-25 · Quantum Machines · Series C · USD 170 M · PSG Equity lead · USD 280 M cumulative · closed C[528]
2025-12-03 · Delft Circuits · Series A extension · EUR 8 M · DeepTech XL, HTGF, QuVest · EUR 15 M cumulative · closed P[530]
2026-06-17 · Quantum Machines · M&A, PCB Engineering (Hungary) · undisclosed · closed C[528]

Market & supply chain. Racks are competitive and commoditising: five vendors qualified for NVQLink C[531], Quantum Machines best capitalised at USD 280 M cumulative C[528], Qblox an order of magnitude smaller C[529]. Fridges and their wiring are concentrated, and Delft Circuits at EUR 15 M cumulative P[530] is the one significant independent flex supplier — a single point of failure. Pays for G2, G3, G7; not G4.

IP & standards. No dated patent-family count for cryogenic rf cabling or RT control was found in a named database — no dated fact found. No formal standard; the closest is NVQLink, which since 2025-10-28 defines a common GPU-side interface across five control vendors C[531] while each pulse stack stays proprietary.

Roadmaps & track record. Delft Circuits (2025-11-10, for 2029): 40,000+ lines per fridge, no interim milestone R[523]. Bluefors (2026-06-16, undated): KIDE at >4,000 lines, product page only C[303]. Zurich Instruments (2026-03-09, undated): "several thousand qubits" C[526]. Both cabling vendors have shipped every density step they announced; 2029 is nonetheless a straight-line projection.

Strategic reading. If RT wiring reaches 10⁴ qubits, the rack vendors and Bluefors keep the control budget and cryo-CMOS or SFQ control stays a research programme. If density stalls near 4,000–5,000 lines, bargaining power moves inside the fridge, where no RT vendor owns IP — and the strongest cryo-CMOS results sit with IBM and HRL, one company since 2026-08-26 fact. Export control favours the incumbent G[301].

Outlook & open questions

Confirm by end-2027 if one fridge runs >2,000 qubits on RT lines with published fidelity at that density; demote after another year of line-count specifications without a wired system. Best case by 2029: flex density plus deeper multiplexing reaches 10⁴ qubits, stack unchanged. Worst case: density plateaus near 4,000–5,000 lines while roadmaps beyond assume undelivered cryo-CMOS or SFQ. Open questions: does crosstalk grow faster than linearly past ~1,000 lines; do flex density and multiplexing compound or hit independent walls; will any vendor commit to in-fridge control before RT wiring visibly fails; does multi-fridge partitioning make the per-fridge ceiling irrelevant.

References
  1. [1] Google Quantum AI and Collaborators, “Quantum error correction below the surface code threshold,” Nature, vol. 638, no. 8052, pp. 920–926, Dec. 2024, doi: 10.1038/s41586-024-08449-y. D
  2. [190] Members of the HRL Quantum Team and Collaborators, “A digitally controlled silicon quantum processing unit,” arXiv:2604.16216, Apr. 2026. D
  3. [292] J. Gambetta, “The hardware and software for the era of quantum utility is here,” IBM Quantum Computing Blog, Dec. 4, 2023. [Online]. Available: https://www.ibm.com/quantum/blog/quantum-roadmap-2033 C
  4. [301] US Department of Commerce, Bureau of Industry and Security, “Commerce Control List Additions and Revisions; Implementation of Controls on Advanced Technologies Consistent With Controls Implemented by International Partners,” Federal Register, vol. 89, p. 72926, Sep. 6, 2024. [Online]. Available: https://www.federalregister.gov/documents/2024/09/06/2024-19633/commerce-control-list-additions-and-revisions-implementation-of-controls-on-advanced-technologies G
  5. [303] Bluefors, “KIDE Cryogenic Platform — For Large-Scale Quantum Computing,” Jun. 16, 2026. [Online]. Available: https://bluefors.com/products/kide-cryogenic-platform/ C
  6. [304] C. Jordan et al., “A quantum computer controlled by superconducting digital electronics at millikelvin temperature,” Nat. Electron., vol. 9, no. 3, pp. 287–294, Mar. 2026, doi: 10.1038/s41928-026-01576-6. D
  7. [522] S. Krinner et al., “Engineering cryogenic setups for 100-qubit scale superconducting circuit systems,” EPJ Quantum Technology, vol. 6, no. 1, Art. no. 2, Dec. 2019, doi: 10.1140/epjqt/s40507-019-0072-0. arXiv:1806.07862. D
  8. [523] Physics World (IOP Publishing), “Delft Circuits, Bluefors: the engine-room driving joined-up quantum innovation,” Nov. 10, 2025. [Online]. Available: https://physicsworld.com/a/delft-circuits-bluefors-the-engine-room-driving-joined-up-quantum-innovation/ C
  9. [524] Bluefors, “Bluefors closes the acquisition of Cryomech,” Mar. 28, 2023. [Online]. Available: https://bluefors.com/press-releases/bluefors-closes-the-acquisition-of-cryomech/ C
  10. [525] ULVAC, “ULVAC Developing Next-Generation Dilution Refrigerator for Quantum Computing by 2026,” Nasdaq (JCN Newswire), Mar. 20, 2025. [Online]. Available: https://www.nasdaq.com/press-release/ulvac-developing-next-generation-dilution-refrigerator-quantum-computing-2026-2025-03 C
  11. [526] Zurich Instruments, “Zurich Instruments Launches the ZQCS Quantum Control System to Master the Long-Lived Logical Qubit Challenge,” Mar. 9, 2026. [Online]. Available: https://www.zhinst.com/americas/en/news/zurich-instruments-launches-zqcs-quantum-control-system-master-long-lived-logical-qubit/ C
  12. [527] A. Noori et al., “A Cryo-CMOS Control System for Large-Scale Superconducting Qubit Quantum Computing: Part 2,” IBM Research, Mar. 16, 2026. [Online]. Available: https://research.ibm.com/publications/a-cryo-cmos-control-system-for-large-scale-superconducting-qubit-quantum-computing-part-2 C
  13. [528] Quantum Machines, “Quantum Machines Raises $170M as Its Customer Base Exceeds 50% of Companies Developing Quantum Computers,” Feb. 25, 2025. [Online]. Available: https://www.quantum-machines.co/press-release/quantum-machines-raises-170-million-in-series-c-funding/ C
  14. [529] E. Flipse, “Qblox secures series A funding to accelerate quantum control stack development,” Qblox Newsroom, Jun. 20, 2024. [Online]. Available: https://qblox.com/newsroom/qblox-secures-series-a-funding-quantum-control-stack-development C
  15. [530] M. U. Rehman, “Delft Circuits Names Martin Danoesastro CEO and Extends Funding Round,” The Quantum Insider, Dec. 3, 2025. [Online]. Available: https://thequantuminsider.com/2025/12/03/delft-circuits-new-ceo-financing/ P
  16. [531] NVIDIA, “NVIDIA Introduces NVQLink — Connecting Quantum and GPU Computing for 17 Quantum Builders and Nine Scientific Labs,” Oct. 28, 2025. [Online]. Available: https://nvidianews.nvidia.com/news/nvidia-nvqlink-quantum-gpu-computing C
  17. [890] J. R. Guimarães et al., “Quantum environment afterglow from broadband excitation spectroscopy in superconducting qubits,” arXiv:2609.31280, Sep. 2026. P