Tianyan-504 / "Xiaohong" chip

Raveh Neeman

doi:10.5281/zenodo.22674814

China Telecom Quantum Group + CAS + QuantumCTek

Tianyan-504 / "Xiaohong" chip

China Telecom Quantum Group + CAS + QuantumCTek · superconducting circuits · DEPLOYED (launched 2024 — 'the largest commercially available quantum computer', 'an engineering exploration on system scaling limitation' in the owner's words, arXiv:2512.10504; acceptance completed in 2025 per QuantumCTek's 2025 annual report, Mar 2026) (Dec 2024) · 504 physical qubits · access: cloud service (Cqlib SDK; operator paper Dec 2025)

architecture: Transmon lattice with tunable couplers · Open on the map

Register profile — the machine's variant of its architecture

qubit type: transmon

gate mechanism: not published; the owner SDK hard-codes an FSIM native gate for tianyan504 alone, beside CZ and XY2P/XY2M (cqlib-tianyan device_config.rs, Sep 2026); no mechanism paper

connectivity: not published

control: domestically developed kilo-qubit measurement-and-control system - the actual asset

control placement: room-temp

readout: dispersive

gate evidence: no published figure

flags: access disputed, no published error rates

Technologies by layer — the machine's cell per layer

1 Qubit carrier	Transmon · primary ▨ 🔎 504 transmons on a single "Xiaohong" chip (delivered ≈Apr 2024, system unveiled 5–6 Dec 2024); largest SC chip in China
2 Encoding	Bare physical qubit (no encoding) · primary ◌ 🔎 bare transmon \|0⟩/\|1⟩ subspace; family-determined, no machine-specific source
3 Gate mechanism	Tunable-coupler CZ / iSWAP · alternate ▨ 🔎 nearest technology if published; coupler type not published — undisclosed — exists, nothing published ▨ 🔎 gate mechanism, coupler type and fidelities not published
4 Connectivity / transport	Static nearest-neighbour lattice · primary ▨ 🔎 topology not published
5 Control	Room-temperature electronics + per-qubit coax/flex · primary ▨ 🔎 domestic kilo-qubit measurement-and-control system (chip is its validation vehicle); target ≥1,000 q, sub-µs feedback latency by 2026
6 Readout	Dispersive microwave readout (+TWPA, Purcell) · primary ◌ 🔎 dispersive readout (family-determined); no readout data published
7 Code	— none — nothing in this layer ▨ 🔎 no QEC code; no algorithms published
8 Decoder	— none — nothing in this layer ▨ 🔎 no decoder; no QEC run
9 Interconnect	— none — nothing in this layer ◌ 🔎 504 qubits on a single chip; monolithic, no interconnect
10 Manufacturing	Superconducting-qubit lithography (Al/AlOx/Al junctions, Nb wiring, 300 mm) · primary ◌ 🔎 superconducting-qubit lithography; family-determined, no machine-specific fab source

evidence: ✅ 0 / 11