Willow
Willow
Register profile — the machine's variant of its architecture
qubit type: frequency-tunable transmon, participation-ratio engineered
gate mechanism: tunable transmon couplers, native CZ 42 ns; 1Q XY 25 ns; QEC cycle 1.1 us
connectivity: square lattice, average connectivity 3.47
control: room-temperature control; QEC loop classifies on the control electronics and ships to a workstation over low-latency Ethernet
control placement: room-temp
readout: frequency-multiplexed dispersive; multi-level reset of measure qubits every cycle; DQLR leakage removal on data qubits
gate evidence: a number stated by the vendor, protocol unstated
decoder mode: real-time throughput — keeps up with the syndrome stream, no feedback into the circuit
codes: google_dynamic_surface, quantum_repetition, steane, triangular_color, xzzx
flags: estimated baseline
Technologies by layer — the machine's cell per layer
| 1 Qubit carrier | |
| 2 Encoding | Bare physical qubit (no encoding) · primary ◌ 🔎 bare transmon two-level subspace; no encoding beyond the physical qubit |
| 3 Gate mechanism | Tunable-coupler CZ / iSWAP · primary ▣ Fig. 2a (cycle circuit, CZ); Fig. 1b (CZ error CDF); SI §I ✅ tunable transmon couplers, native CZ 42 ns; 1Q XY 25 ns, 1Q error 6.2e-4; QEC cycle 1.1 µs (Dec 2024) |
| 4 Connectivity / transport | Static nearest-neighbour lattice · primary ▣ Fig. 1a (square-lattice d=7 surface-code layout) ✅ square lattice on one 105-qubit die; average connectivity 3.47 (interior degree 4, boundary-limited) |
| 5 Control | Room-temperature electronics + per-qubit coax/flex · primary ▤ SI §III.D.1 (real-time decoding system: technical requirements); SI §II ✅ room-temperature control; QEC loop classifies on control electronics, ships to a dedicated workstation over low-latency Ethernet |
| 6 Readout | Dispersive microwave readout (+TWPA, Purcell) · alternate ▤ SI §I (gates and readout); Fig. 1b blue (measurement error CDF) ✅ frequency-multiplexed dispersive; readout error 0.8e-2 (Dec 2024); multiplexing factor unpublished Fast unconditional / dissipative qubit reset · alternate ▤ Methods: reset and leakage removal 🔎 multi-level reset of the measure qubits every cycle; DQLR leakage removal on the data qubits — (Atlas gap: ∅G-lru) · primary ▣ Fig. 1a (leakage-removal qubits, green); Fig. 2a,d (DQLR) ✅ DQLR + 4 dedicated leakage-removal qubits in the 101-qubit d=7 patch; leakage rate not published as a single number |
| 7 Code | Rotated surface code (+ yoked variants) · primary ▣ Fig. 1a,c,d (d=3/5/7 memory, Λ fit); §II ✅ rotated/XZZX surface: d=7 (101 q) 0.143%/cycle, Λ = 2.14, logical lifetime 291 µs, 2.4× beyond break-even (Dec 2024) Colour code (transversal Cliffords) · alternate ▤ ✅ triangular colour code: d=5 at 8.19(14)e-3 logical error/cycle, Tesseract decoder, RL-calibrated (2026) Magic-state factory (cultivation / distillation / code switching) · alternate ▤ ✅ magic-state cultivation in d=3 colour code, grafted into d=5 XZZX surface on 54 q; |T⟩ error 1(1)e-4 at ~8% acceptance, ~40× below injection |
| 8 Decoder | MWPM / Sparse Blossom (+ correlated matching) · primary ▣ Fig. 4 (real-time streaming decoder, latency); §V; SI §III.D.2 ✅ sparse-blossom MWPM in loop on off-chip workstation: d=5 for 10⁶ cycles, 63 µs mean latency vs 1.1 µs cycle (Dec 2024) Neural decoders (AlphaQubit 2, CNN, transformers) · alternate ▤ ✅ AlphaQubit2 neural decoder: sub-1 µs/cycle at surface d=11; first real-time colour-code decoding at d=9 In-loop RL calibration / control steering · alternate ▤ ✅ RL in-situ calibration, >1,000 parameters tuned live on d=5/d=7; d=7 at 7.72(9)e-4 logical error/cycle with AlphaQubit2 (Jul 2026) |
| 9 Interconnect | |
| 10 Manufacturing | Superconducting-qubit lithography (Al/AlOx/Al junctions, Nb wiring, 300 mm) · primary ▤ ✅ Google's own Santa Barbara fab; coherence gains from improved fabrication and participation-ratio engineering — (Atlas gap: ∅G-calib) · alternate ▤ ✅ Snake optimiser splits ~3N-dim frequency problem; ~3.7× cycle-error suppression, mean cycle error ~7.2e-3, ~40× narrower distribution |
Standard records
acceptance fraction → 0.08 · best (magic-state cultivation)
Dec 2025 · source
correlated-burst rate → 3.30e-10 per cycle · typical (~1 correlated event per hour, ~1 per 3e9 cycles)
2024 · source
crosstalk → 5.50e-4 · typical (fitted component of the error budget, not a direct measurement)
Dec 2024 · source
connectivity degree → 3.47 neighbours · typical (average; 4 interior)
Dec 2024 · source
2Q error under full-width parallel operation → 1.50e-3 · best (median; 1.2e-3 mean)
Oct 2025 · source
idle / memory error per round → 7.72e-4 · best published superconducting logical error per cycle at d=7 (Jul 2026)
Jul 2026 · source
qubit·rounds per magic state → 1.00e-4 · best (T-state error at 8% acceptance)
~2 extra cultivation rounds + 3 QEC cycles · Dec 2025 · source
SPAM error → 8.00e-3 · typical (readout error)
Dec 2024 · source
parameter spread → 40 · best (narrowing of the cycle-error distribution after Snake optimisation)
Mar 2024 · source
T1 relaxation → 68 µs · typical (mean)
Dec 2024 · source
1Q gate time → 25 ns · best
Dec 2024 · source
T2 coherence (echo/DD) → 89 µs · typical (CPMG)
Dec 2024 · source
decode latency per round → 63 µs · best-in-loop 2024 (mean at d=5); under 1e-6 s per cycle at d=11 in 2026
Dec 2024 · source
evidence: ✅ 14 / 17