IBM Quantum Nighthawk r1

Raveh Neeman

doi:10.5281/zenodo.22674814

IBM

IBM Quantum Nighthawk r1

IBM · superconducting circuits · DEPLOYED (Dec 2025) · 120 physical qubits · access: cloud service

architecture: Transmon lattice with tunable couplers · Open on the map

Register profile — the machine's variant of its architecture

qubit type: fixed-frequency transmon + next-gen tunable coupler

gate mechanism: native CZ, "Heron-class gate fidelity"

connectivity: square lattice, degree 4

control: room-temperature RF

control placement: room-temp

readout: multiplexed dispersive

gate evidence: the vendor's datasheet or dashboard

codes: google_dynamic_surface, rotated_surface, xzzx

Technologies by layer — the machine's cell per layer

1 Qubit carrier	Transmon · primary ▥ Fig. (chip photo: 'IBM Quantum Nighthawk chip'); text: 120-qubit Nighthawk unveiled ✅ fixed-frequency transmon + next-generation tunable couplers; 120 programmable qubits (deployed Dec 2025)
2 Encoding	Bare physical qubit (no encoding) · primary ◌ 🔎 bare transmon two-level subspace; no encoding beyond the physical qubit
3 Gate mechanism	Tunable-coupler CZ / iSWAP · primary ▥ §New capabilities for scaling advantage (couplers 176→218; 30% more complex circuits, fewer SWAPs) ✅ native CZ via next-generation tunable couplers, "Heron-class gate fidelity"; 5,000 2Q gates at r1 (Dec 2025)
4 Connectivity / transport	Static nearest-neighbour lattice · primary ▥ Fig. ('Nighthawk's qubit plane includes 120 qubits arranged in a square lattice') ✅ square lattice, degree 4 — IBM's first departure from heavy-hex since 2021
5 Control	Room-temperature electronics + per-qubit coax/flex · primary ▨ 🔎 room-temperature RF control
6 Readout	Dispersive microwave readout (+TWPA, Purcell) · primary ◌ 🔎 multiplexed dispersive readout
7 Code	Rotated surface code (+ yoked variants) · primary ▤ abstract; memory results ✅ rotated surface d=3 and d=5 memory, up to 50 rounds without reset, on ibm_berlin; d=5 with defect exclusion on ibm_miami (sweep 7 Oct 2026, source read)
8 Decoder	— none — nothing in this layer ▨ 🔎 no decoder; no QEC run
9 Interconnect	— none — nothing in this layer ◌ 🔎 monolithic single 120-qubit module, no interconnect
10 Manufacturing	Superconducting-qubit lithography (Al/AlOx/Al junctions, Nb wiring, 300 mm) · primary ▥ §New capabilities for scaling advantage (all chips start on 300 mm wafers, Albany NanoTech; 2x R&D speed, 10x complexity) 🔎 IBM Albany 300 mm superconducting-qubit fab (IBM claims 50% shorter processor development, 10× complexity headroom vs 200 mm)

Standard records

connectivity degree → 4 neighbours · best for superconducting 2026

IBM's first departure from heavy-hex since 2021 · Dec 2025 · source

evidence: ✅ 4 / 10