6-qubit superconducting quantum processor
DRDO DYSL-QT with TIFR and TCS
6-qubit superconducting quantum processor
Register profile — the machine's variant of its architecture
qubit type: superconducting-circuit qubit (type not published)
gate mechanism: not published
connectivity: TIFR ring-resonator architecture (shared multi-path coupling resonator)
control: commercial off-the-shelf electronics plus custom-programmed development boards (DYSL-QT)
control placement: room-temp
readout: not published
gate evidence: no published figure
flags: no published error rates, press sources only
Technologies by layer — the machine's cell per layer
| 1 Qubit carrier | |
| 2 Encoding | Bare physical qubit (no encoding) · primary ◌ 🔎 bare two-level subspace assumed; no encoding beyond the physical qubit |
| 3 Gate mechanism | |
| 4 Connectivity / transport | — (Atlas gap: ∅G-bus) · primary ▨ ✅ ring-resonator design invented at TIFR: qubits sit around one shared ring resonator used as a multi-path coupler (architecture paper: up to 12 qubits, each linked to 9 others) |
| 5 Control | Room-temperature electronics + per-qubit coax/flex · primary ▨ ✅ control and measurement apparatus built by DYSL-QT from commercial off-the-shelf electronics and custom-programmed development boards; TCS cloud interface submits circuits |
| 6 Readout | Dispersive microwave readout (+TWPA, Purcell) · primary ◌ 🔎 dispersive readout assumed (family-determined); not described |
| 7 Code | |
| 8 Decoder | |
| 9 Interconnect | |
| 10 Manufacturing | Superconducting-qubit lithography (Al/AlOx/Al junctions, Nb wiring, 300 mm) · primary ▨ ✅ qubits designed and fabricated in-house at TIFR, Mumbai |
evidence: ✅ 3 / 10