SpinQ Ursa Major (25 q / 103 q)

Raveh Neeman

doi:10.5281/zenodo.22674814

SpinQ Technology · superconducting circuits · DEPLOYED (the 25-qubit systems) (2025-2026) · 25 physical qubits · access: on-prem sold + cloud

architecture: Transmon lattice with tunable couplers · Open on the map

Register profile — the machine's variant of its architecture

qubit type: transmon

gate mechanism: tunable coupler

connectivity: planar lattice

control: room-temperature RF

control placement: room-temp

readout: dispersive

gate evidence: no published figure

flags: no published error rates, source not confirmed

Technologies by layer — the machine's cell per layer

1 Qubit carrier	Transmon · primary ▦ §Principles of superconducting quantum chips (Josephson-junction nonlinear LC circuits); spec table C25/C103 ✅ transmon; 25-q and 103-q chips taped out, packaged and validated by mid-2026; no fidelity data published
2 Encoding	Bare physical qubit (no encoding) · primary ◌ 🔎 Bare two-level subspace — Computational subspace of an anharmonic oscillator; leakage to \|2⟩ is the price.
3 Gate mechanism	Tunable-coupler CZ / iSWAP · primary ▦ spec table: Coupler type — Tunable couplers (C5, C25); 2Q fidelity C25 Pro ≥99% med. ✅ tunable coupler; no gate fidelity published for either new chip
4 Connectivity / transport	Static nearest-neighbour lattice · primary ▦ spec table: Topology — 2D lattice (C25/C103); §Advantages (enhanced 2D lattice topology) ✅ planar lattice; degree 4 (register)
5 Control	Room-temperature electronics + per-qubit coax/flex · primary ▦ page text (independent control lines per qubit) 🔎 room-temperature RF
6 Readout	Dispersive microwave readout (+TWPA, Purcell) · primary ◌ 🔎 dispersive
7 Code	Rotated surface code (+ yoked variants) · alternate ▦ page text (native QEC support; surface code up to d = 7) 🔎 targeted only: d=3 surface-code validation stated for 2026; not run — none — nothing in this layer ▨ 🔎 no QEC code run (NISQ); d=3 surface-code validation stated for 2026
8 Decoder	— none — nothing in this layer ▨ 🔎 no decoder demonstrated; "cascaded quantum Hamming code decoding" claimed (accepted at IEEE QCE 2026)
9 Interconnect	— none — nothing in this layer ◌ 🔎 monolithic single module, no interconnect
10 Manufacturing	Superconducting-qubit lithography (Al/AlOx/Al junctions, Nb wiring, 300 mm) · primary ◌ 🔎 superconducting-qubit fab on SpinQ's own pilot line; no process details published

evidence: ✅ 3 / 11