Quantum Spain quantum computer at BSC

Barcelona Supercomputing Center (Quantum Spain; installed by Qilimanjaro-GMV) · superconducting circuits · DEPLOYED (expanded to 35 qubits) (May 2026) · 35 physical qubits · access: national allocation (open access via RES)

qubit type: superconducting, gate-based (qubit type not published)

gate mechanism: not published

connectivity: not published

control: not published

readout: not published

gate evidence: no published figure

flags: no published error rates, specification absent

1 Qubit carrier	Transmon · primary ▨ 🔎 superconducting gate-based processor, 5 to 35 qubits (May 2026); qubit type not published
2 Encoding	Bare physical qubit (no encoding) · primary ◌ 🔎 bare two-level subspace assumed (family-determined)
3 Gate mechanism	— undisclosed — exists, nothing published ▨ 🔎 gate mechanism and fidelities not published
4 Connectivity / transport	Static nearest-neighbour lattice · primary ◌ 🔎 topology not published; static nearest-neighbour on-chip coupling assumed
5 Control	Room-temperature electronics + per-qubit coax/flex · primary ◌ 🔎 room-temperature RF control assumed (family-determined)
6 Readout	Dispersive microwave readout (+TWPA, Purcell) · primary ◌ 🔎 dispersive readout assumed (family-determined)
7 Code	— none — nothing in this layer ▨ 🔎 no QEC code reported; NISQ access through RES calls
8 Decoder	— none — nothing in this layer ◌ 🔎 no decoder; no QEC run
9 Interconnect	— none — nothing in this layer ◌ 🔎 one processor coupled to MareNostrum 5; no inter-module quantum link
10 Manufacturing	Superconducting-qubit lithography (Al/AlOx/Al junctions, Nb wiring, 300 mm) · primary ◌ 🔎 superconducting-qubit fabrication (family-determined); chip maker not named

evidence: ✅ 0 / 10