IBM Quantum Condor

Raveh Neeman

doi:10.5281/zenodo.22674814

IBM · superconducting circuits · DEMONSTRATED (unveiled 4 Dec 2023 as an innovation milestone "solving scale"; never offered on the IBM Quantum Platform; not in IBM's current or retired system lists) (4 Dec 2023) · 1121 physical qubits · access: lab-only

architecture: Transmon lattice with tunable couplers · Open on the map

Register profile — the machine's variant of its architecture

qubit type: fixed-frequency transmon

gate mechanism: cross-resonance

connectivity: heavy-hex

control: room-temperature RF; ~1 mile of high-density cryogenic flex wiring

control placement: room-temp

readout: multiplexed dispersive

role: scale demonstrator — built to prove scale, performance not published, not operated for users

gate evidence: words only, no figure ("comparable to…")

flags: cryogenic details missing, never accessible to users, no published error rates

Technologies by layer — the machine's cell per layer

1 Qubit carrier	Transmon · primary ▥ §Breaking the 1,000-qubit barrier with Condor (1,121 superconducting qubits) ✅ fixed-frequency transmon; 1,121 q on a single die (ANNOUNCED Dec 2023, never GA)
2 Encoding	Bare physical qubit (no encoding) · primary ◌ 🔎 Bare two-level subspace — Computational subspace of an anharmonic oscillator; leakage to \|2⟩ is the price.
3 Gate mechanism	Cross-resonance (fixed-frequency, all-microwave) · primary ▥ §Breaking the 1,000-qubit barrier with Condor (cross-resonance gate technology) ✅ cross-resonance (design); IBM (Dec 2023): performance "comparable to Osprey" - no gate figure published; the chip is a scale demonstrator ("solving scale"), never offered to users
4 Connectivity / transport	Static nearest-neighbour lattice · primary ▨ 🔎 heavy-hex, degree ≤3; 1,121 q
5 Control	Room-temperature electronics + per-qubit coax/flex · primary ▥ §Breaking the 1,000-qubit barrier with Condor (over a mile of cryogenic flex IO wiring, one dilution fridge) ✅ room-temperature RF, ≈1 RF line per qubit; ~1 mile of high-density cryogenic flex wiring in a custom cryostat (Dec 2023)
6 Readout	Dispersive microwave readout (+TWPA, Purcell) · primary ◌ 🔎 multiplexed dispersive
7 Code	— none — nothing in this layer ▨ 🔎 no QEC code run; exploratory platform, never operated as a user-accessible system
8 Decoder	— none — nothing in this layer ▨ 🔎 no decoder; no QEC run
9 Interconnect	— none — nothing in this layer ◌ 🔎 monolithic single 1,121-q die, no interconnect
10 Manufacturing	Superconducting-qubit lithography (Al/AlOx/Al junctions, Nb wiring, 300 mm) · primary ▥ §Breaking the 1,000-qubit barrier with Condor (50% qubit density, qubit fabrication + laminate size advances) ✅ superconducting-qubit lithography; 3-D packaging for 50% higher qubit density

Standard records

control lines per qubit → 1 lines/qubit · best-of-era (~1 mile of flex at 1,121 q)

the clearest published statement of the I/O wall · Dec 2023 · source

evidence: ✅ 4 / 10

Pictures

Every picture carries the story of what it shows and its credit line.

File:Keynote - Entering the Era of Quantum Utility (IBM Research) 11.png — A frame from IBM Research's keynote video 'Entering the Era of Quantum Utility' (IBM Quantum Summit 2023, dated 5 December 2023): a timeline 2016–2023 beside a rendered card reading 'Condor / 1121 qubits / scale | yield'. It is a slide graphic, not a photograph; no chip or qubit layout is visible. It records how IBM presented its Condor superconducting processor, framing the 1,121-qubit count as a step in scale and fabrication yield. “Keynote - Entering the Era of Quantum Utility (IBM Research) 11” by IBM Research, commons.wikimedia.org/wiki/File:Keynote_-_Entering_the_Era_o…, CC BY 3.0 (creativecommons.org/licenses/by/3.0/)

File:Keynote - Entering the Era of Quantum Utility (IBM Research) 13.png — A frame from IBM Research's keynote video 'Entering the Era of Quantum Utility' (dated 5 December 2023): a rendered close-up of a dark plate engraved with a line drawing of a condor, beside a dot-perforated panel and a faint IBM mark. It is a decorative render, not a photograph, and shows no chip or qubits. It serves only as the emblem of IBM's Condor superconducting processor; for the hardware itself, look elsewhere in the register. “Keynote - Entering the Era of Quantum Utility (IBM Research) 13” by IBM Research, commons.wikimedia.org/wiki/File:Keynote_-_Entering_the_Era_o…, CC BY 3.0 (creativecommons.org/licenses/by/3.0/)

A data plot, on a logarithmic scale, of superconducting physical qubit count against year from 2015 to 2035: filled gold points are demonstrated processors (Sycamore 53, Osprey 433, Condor 1,121), open points are roadmap targets, and a dotted blue model doubles yearly from 58 qubits in 2020. Made by Raveh Neeman (Qodeh) for this map, dated 6 September 2026. Notice the three light-blue ceiling lines for room-temperature electronics, cryogenic CMOS and superconducting single-flux-quantum control, each marking how far that control approach can scale. MON-F8 — Superconducting qubit trends — Raveh Neeman (Qodeh), CC BY 4.0 (Superconductor Electronics Monitor 2026 v1.1, © Raveh Neeman 2026). doi.org/10.5281/zenodo.22537315