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AWS dual-rail transmon erasure line

AWS Center for Quantum Computing (named Amazon Center for Quantum Computing in the Apr 2026 paper)

AWS dual-rail transmon erasure line

AWS Center for Quantum Computing (named Amazon Center for Quantum Computing in the Apr 2026 paper) · superconducting circuits · DEMONSTRATED (Mar 2024 / Apr 2026) · 2 physical qubits · access: lab-only

Register profile — the machine's variant of its architecture

qubit type: dual rail from two resonantly coupled tunable transmons
gate mechanism: ancilla-mediated bosonic gates
connectivity: pairwise
control: room-temperature control; symmetrically coupled readout resonator
control placement: room-temp
readout: single-shot erasure detection in 384 ns; residual logical error 6.0(2)e-4 per check; induced dephasing 8(3)e-5 per check
gate evidence: no published figure
codes: dual_rail
flags: a component, not a machine

Technologies by layer — the machine's cell per layer

1 Qubit carrier
Transmon · primary ▣ Fig. 1a-b (two coupled transmons); §II ✅
each dual-rail qubit is two resonantly coupled tunable transmons (not cavities)
2 Encoding
Dual-rail (erasure) encoding · primary ▣ Fig. 1a-b (single-excitation subspace); Fig. 2c-d (ILRB) ✅
one excitation across two coupled transmons; erasure error 2.54(1)e-2 per check, residual logical error 6.0(2)e-4 per check (Apr 2026)
3 Gate mechanism
Ancilla-mediated bosonic gates (cat CX, dual-rail CZ, beamsplitter) · primary ▤ §V (Continuous Parallel Erasure Detection); App. F ✅
ancilla-mediated gates with continuous parallel erasure detection: median 7.2e-5 error per gate, detection overhead <1e-5 (Apr 2026)
4 Connectivity / transport
Static nearest-neighbour lattice · primary ▣ Fig. 1a-b (coupled transmon pair + shared resonator) ✅
pairwise coupling
5 Control
Room-temperature electronics + per-qubit coax/flex · primary ▤ 🔎
room-temperature control
6 Readout
Mid-circuit erasure check · primary ▣ Fig. 1 (symmetric resonator + Purcell filter), Fig. 2a-b (χ-matching), Fig. 3; §II-IV ✅
symmetrically coupled resonator (χ_DR/χ <1e-2): single-shot erasure check in 384 ns, residual logical error 6.0(2)e-4, dephasing 8(3)e-5 per check
7 Code
Erasure-adapted codes · primary ▤ 🔎
dual-rail erasure conversion only; code targeted, not run; no distance scaling (L1)
8 Decoder
— none — nothing in this layer ▤ 🔎
no decoder; erasure conversion only, no code run
9 Interconnect
— none — nothing in this layer ◌ 🔎
monolithic single module, no interconnect
10 Manufacturing
Superconducting-qubit lithography (Al/AlOx/Al junctions, Nb wiring, 300 mm) · primary ▤ App. A (Device) 🔎
superconducting tunable-transmon chip; no machine-specific fab detail published

Standard records

QND fidelity / survival → 0.999 · best (residual logical error 6.0e-4 per erasure check)
erasure check in 384 ns · Apr 2026 · source
evidence: ✅ 5 / 10