A drawn gate schematic, not a photograph: two views of a 'tetron' qubit made of two parallel topological nanowires joined by a superconducting backbone, with Majorana zero modes numbered 1–4 at the wire ends and surrounding gate electrodes. It is Figure 2 of "Roadmap to fault tolerant quantum computation using topological qubit arrays" by Aasen, Aghaee, Alam and co-authors. The black loops show how gates connect pairs of Majorana modes through quantum dots to measure their joint parity (XX or ZZ), the basic operation of a measurement-based topological qubit.“Fig. 2 — Figure 2: Gate schematic of the single-qubit device with measurement loops indicated. The single-qubit device shown functionally in the left-most panel of Fig. ” by David Aasen et al., arxiv.org/abs/2502.12252, CC BY 4.0 (creativecommons.org/licenses/by/4.0/)
