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Measurement-based Majorana gate g_mbq

Clifford gates generated by sequences of joint fermion-parity measurements instead of physical braiding; specified since 2008, never operated.

Measurement-based Majorana gate

g_mbq · layer 3 Gate mechanism · empty slot — no technology yet

Braiding by sequences of parity measurements — nothing demonstrated; single-wire readout only.

Reading marks
∅ empty slot
Brief →

Key references

[475] P. Bonderson, M. Freedman, and C. Nayak, “Measurement-Only Topological Quantum Computation… · 2008
[421] T. Karzig et al., “Scalable designs for quasiparticle-poisoning-protected topological quan… · 2017
[21] M. Aghaee et al., “20 Second Parity Lifetime in an InAs–Pb Tetron Device,” arXiv:2606.0388… · 2026
[13] Microsoft Azure Quantum, “Interferometric single-shot parity measurement in InAs–Al hybrid… · 2025
[20] M. Aghaee et al., “Distinct Lifetimes for X and Z Loop Measurements in a Majorana Tetron D… · 2025

Design space — attributes

(a) carrier affinity
fabricated
(b) time · entangling
— · deterministic
(c) readout
—
(d) mobility
static nearest-neighbour wiring
(e) control
low-frequency electrical @ room temperature
(f) error structure
unknown / contested
(g) manufacturing
III-V MBE heterostructures

Evaluation space — dated attributes

status → no two-qubit operation, no entanglement
defines: error channel · 2026-06 · source

Standard records

2Q error under full-width parallel operation → not published · best
No two-qubit Majorana operation exists, in parallel or otherwise; only single-wire parity readout has been demonstrated · 2026-06 · source [D] ⓘ
crosstalk → not published · best
No measurement-based Majorana gate has been demonstrated, so no crosstalk figure can exist · 2026-06 · source [D] ⓘ

Actors & goals — annotations

Used by 2 machines (2 primary · 0 alternate)

↗ its register card · paper / product / press: links that name the machine (attribution checked on 20 Sep 2026)

Pictures

Every picture carries the story of what it shows and its credit line.

Fig. 2 — Figure 2: Gate schematic of the single-qubit device with measurement loops indicated. The single-qubit device shown functionally in the left-most pa…
A drawn gate schematic, not a photograph: two views of a 'tetron' qubit made of two parallel topological nanowires joined by a superconducting backbone, with Majorana zero modes numbered 1–4 at the wire ends and surrounding gate electrodes. It is Figure 2 of "Roadmap to fault tolerant quantum computation using topological qubit arrays" by Aasen, Aghaee, Alam and co-authors. The black loops show how gates connect pairs of Majorana modes through quantum dots to measure their joint parity (XX or ZZ), the basic operation of a measurement-based topological qubit. “Fig. 2 — Figure 2: Gate schematic of the single-qubit device with measurement loops indicated. The single-qubit device shown functionally in the left-most panel of Fig. ” by David Aasen et al., arxiv.org/abs/2502.12252, CC BY 4.0 (creativecommons.org/licenses/by/4.0/)
Fig. 1 — Figure 1: Braiding geometries and protocols. (a) Trijunction network and (b) quantum-dot-assisted architecture, showing the device layout to exchang…
Shaded schematic drawings, not device images, of two ways to exchange (braid) Majorana zero modes: a T-shaped nanowire junction with modes γ1-γ4 at the wire ends, and two wire segments linked by a quantum dot, each with step-by-step frames of the exchange. From "Noisy Braiding of Majorana Modes: A Comparison of Nanowire Trijunction and Quantum-Dot-Assisted Architectures" by Dibyajyoti Sahu and Suhas Gangadharaiah. Braiding is the intended gate operation of topological qubits; notice the modes moving along wire arms in one design and through the dot in the other. “Fig. 1 — Figure 1: Braiding geometries and protocols. (a) Trijunction network and (b) quantum-dot-assisted architecture, showing the device layout to exchange the…” by Dibyajyoti Sahu, Suhas Gangadharaiah, arxiv.org/abs/2608.09416, CC BY 4.0 (creativecommons.org/licenses/by/4.0/)
Fig. 2 — Figure 2: The example design of six MZMs. The blue wires are topological superconductor wires, which consists a wire of topological semiconductor on…
Two-panel flat schematic, not a device image, of a proposed six-Majorana network: blue topological-superconductor wires (e.g. InAs on Al in a magnetic field) with Majorana modes at their ends, green semiconductor links, two quantum dots, and gates drawn open or closed, joined into one superconducting island. From the arXiv paper "Protocol for detecting the nonlocality of the multi-Majorana Systems" by Bai-Ting Liu, Peng Qian, Zhan Cao and Dong E. Liu. The panels differ only in which gates are open, for single-site versus paired parity measurements through the quantum dots. “Fig. 2 — Figure 2: The example design of six MZMs. The blue wires are topological superconductor wires, which consists a wire of topological semiconductor on a…” by Bai-Ting Liu, Peng Qian, Zhan Cao, Dong E. Liu, arxiv.org/abs/2506.17003, CC BY 4.0 (creativecommons.org/licenses/by/4.0/)
g_mbq · layer 3 Gate mechanism · centrality 5.7 · empty slot — no technology yet · updated 2026-09-04

Measurement-based Majorana gate

Clifford gates generated by sequences of joint fermion-parity measurements instead of physical braiding; specified since 2008, never operated.

Verdict. Falsified as a gate mechanism unless a joint (X-basis) parity measurement with a stated error and any two-tetron operation both appear by end-2027; as of 4 Sep 2026 the count of gate operations is zero.

Key references

Λ = error-suppression factor per code-distance step; QBI = DARPA Quantum Benchmarking Initiative (Stage A concept → B R&D plan → C government V&V); G1–G7 = the report's goal classes (see Actors & economics).

Identity & lineage

Braiding is replaced by a schedule of projective joint fermion-parity measurements. Bonderson, Freedman and Nayak showed in 2008 that an anyonic teleportation identity lets topological-charge measurements produce the braiding transformations S[475]; Karzig et al. made it hardware in 2017 — Cliffords read as differential-capacitance shifts of dots tunnel-coupled to Majorana zero modes (MZMs) S[421]. Every published measurement here is single-wire (Z-type); the two-wire joint measurement that is the gate has never been reported D[21].
a fabricated (1.0) · b gate time unmeasured, deterministic by intent · c no readout of its own
d static · e low-frequency control at room temperature · f error structure unknown · g MBE wire stack

Physics & limits

Fidelity is joint-measurement time over the lifetime of the basis projected, and that ratio is where the mechanism fails. The tetron's Z-loop parity lives 12.4 ms, the X loop, which a gate repeatedly projects, 14.5 µs, ~1000× shorter D[20], attributed to the larger quasiparticle-capture cross-section of the two-loop configuration: poisoning, not dephasing. At SNR 1 in 3.6 µs D[13] one X projection eats a fifth of that window, so a Clifford sequence has no margin. Operation is adaptive (next basis from last outcome), so feed-forward must close inside the same window; none has been published. Over trivial Andreev levels, meanwhile, a measurement sequence implements no braid at all D[23].

Engineering state of the art

table
Year Figure Who Tag+key
2025-02 Single-wire parity readout, 1% assignment error, dwell >1 ms Microsoft Azure Quantum D[13]
2025-07 Tetron Z loop 12.4 ms vs X loop 14.5 µs Microsoft Quantum D[20]
2026-06 ~20 s parity switching, one wire of one InAs–Pb tetron Microsoft Quantum D[21]

No row is a gate: the 2026 result measured one nanowire of a multi-tetron array: no braid, no joint parity, no two-qubit operation, no entanglement, no T1/T2 D[21].

The arXiv HTML of [20] also gives an X loop of ~4 µs and a Z loop of ~9.3 ms for other tunings; the ~1000× ratio holds for both readings, the 14.5 µs / 12.4 ms point values do not. Not published: a dollar figure for DARPA's US2QC award to Microsoft, and any feed-forward latency, dot–wire coupling switching time or projected gate time for this mechanism.

Manufacturing, materials & supply chain

Nothing is fabricated for this mechanism alone: it consumes the InAs–Pb stack and the readout below it. The unbuilt part is control: per-tetron tunable dot–wire couplings, an rf loop per measurable parity, and a demodulator-to-bias path that must resolve inside the X window. At 10³ tetrons the line budget resembles transmon readout; the wall is latency, unquantified because no adaptive sequence has been attempted.

Role in the stack

Requires the Majorana-parity carrier (two wires per tetron) and quantum-capacitance readout; it would supply the topological architecture's entire Clifford layer. The only substitute is braiding in T-junction networks, geometry nobody is building. No derived clock: with no gate operated and no code on the architecture, sum of the syndrome round: gate layers + transport + readout + reset reduces to its readout term, ~3.6 µs D[13], reset unpublished. Verification is telegraph statistics, not benchmarks: no randomised benchmarking, tomography or Bell test exists. QuTech's independent single-shot parity readout (Nature 650, 2026-02-11) replicates the method on InSb dot chains, limited protection stated D[216]; Legg's Matters Arising (2026-06-24) argues the readout regions are disordered and gapless, so the signals may be trivial, and Microsoft's same-day reply concedes nothing D[23].

Actors & economics

Who.
| Organisation | Role | Country | What they do | Evidence |
|---|---|---|---|---|
| Microsoft Quantum | developer | US | Sole builder; tetrons, no gate | D[21] |
| DARPA | investor | US | US2QC final Validation & Co-Design stage since 2025-02-06, AFRL and Johns Hopkins APL evaluating; not a QBI Stage B performer | fact |
| QuTech | research | NL | Independent parity readout, not this gate | D[216] |

Money. 2025-02-06 · Microsoft · US2QC advances to its final Validation & Co-Design stage · undisclosed · DARPA · announced fact. 2026-01-23 · Microsoft · Quantum Pioneers Program · ≤ USD 200,000 per academic proposal for measurement-based topological computing · announced Pfact.

Market & supply chain. No market and no unit economics; only G3/G4 fault tolerance would pay, and only after a two-qubit result. Supply is internal to one company: concentration risk is total.

IP & standards. Microsoft's own published lineage S[421]; no dated patent count specific to this gate found as of 4 Sep 2026.

Roadmaps & track record. ("years not decades", promised 2025-02, for fault tolerance → restated as 2029 in 2026-06; status 4 Sep 2026: no joint measurement, no gate) C[215]; DARPA's utility-scale horizon is 2033 fact. Every annual Microsoft result has been readout; 2029 carries no X-measurement milestone.

Strategic reading. If measurement-only Cliffords work, Microsoft skips T-junction fabrication and owns the architecture; if not, the encoding, readout and epitaxy nodes below lose their only consumer.

Outlook & open questions

Falsifiable in 12–24 months: a first joint (X-basis) parity measurement with a stated assignment error; any operation or entanglement between two tetrons; a published X/Z ratio below 100×. Confirm on the first two; demote to theory if none lands by end-2027. Best case 2029, measurement-only Cliffords on a small array; worst case, X-basis poisoning is intrinsic to the two-loop geometry and the line closes. Open: is the asymmetry geometric or material; does anyone outside Microsoft attempt a joint measurement.

References
  1. [13] Microsoft Azure Quantum, “Interferometric single-shot parity measurement in InAs–Al hybrid devices,” Nature, vol. 638, no. 8051, pp. 651–655, Feb. 2025, doi: 10.1038/s41586-024-08445-2. D
  2. [20] M. Aghaee et al., “Distinct Lifetimes for X and Z Loop Measurements in a Majorana Tetron Device,” arXiv:2507.08795, Jul. 2025. D
  3. [21] M. Aghaee et al., “20 Second Parity Lifetime in an InAs–Pb Tetron Device,” arXiv:2606.03884, Jun. 2026. D
  4. [23] Microsoft Quantum, “Reply to: On the robustness of topological gap detection via transport,” Nature, vol. 654, no. 8120, pp. E27–E28, Jun. 2026, doi: 10.1038/s41586-026-10568-7. D
  5. [215] C. Nayak, “Majorana 2 – Microsoft's Scalable Quantum Processor With Reliable, Long-Lasting Qubits,” Microsoft Quantum. [Online]. Available: https://quantum.microsoft.com/en-us/insights/blogs/majorana-2-scalable-quantum-processor C
  6. [216] N. van Loo et al., “Single-shot parity readout of a minimal Kitaev chain,” Nature, vol. 650, no. 8101, pp. 334–339, Feb. 2026, doi: 10.1038/s41586-025-09927-7. D
  7. [421] T. Karzig et al., “Scalable designs for quasiparticle-poisoning-protected topological quantum computation with Majorana zero modes,” Phys. Rev. B, vol. 95, no. 23, Art. no. 235305, Jun. 2017, doi: 10.1103/PhysRevB.95.235305. arXiv:1610.05289. S
  8. [475] P. Bonderson, M. Freedman, and C. Nayak, “Measurement-Only Topological Quantum Computation,” Phys. Rev. Lett., vol. 101, no. 1, Art. no. 010501, Jun. 2008, doi: 10.1103/PhysRevLett.101.010501. arXiv:0802.0279. S