Error-detection codes ([[4,2,2]], d=2 surface, iceberg, spacetime) code_detect

A distance-2 stabiliser code turns any single-qubit error into a non-trivial syndrome but cannot locate it, so the run is discarded (post-selected), not repaired. Members: [[4,2,2]], checks XXXX and ZZZZ; the distance-2 rotated surface code [[4,1,2]]; Quantinuum's iceberg code [[k+2,k,2]] D[673]; and spacetime codes, which treat a Clifford circuit's outcome bits as a code and add checks that catch faults anywhere in it S[710]. Fault-tolerant detection dates from 2017: [[4,2,2]] on trapped ions D[711] and on IBM's five-qubit cloud chips D[712]. The d=2 surface code followed on transmons at ETH Zürich D[713] and QuTech D[714], and Google ran a small surface-code detection experiment beside its repetition codes D[715].
Carrier-agnostic; static wiring; no control or readout of its own; stochastic Pauli errors only — leakage and loss need their own flags.

One fault flips a check, so an undetected logical error needs two: post-selected infidelity scales as O(ε²), not O(ε) — how IBM's encoded magic state beat every physical qubit pair on its chip D[716]. The price is acceptance. With N fault locations each faulting detectably with probability p, acceptance ≈ e^(−pN) and the sampling overhead, its inverse D[717], is e^(pN) — ~2×10⁴ runs per kept sample at p = 10⁻³, N = 10⁴ — while residual error grows as ~Np² S. A fixed distance-2 code has no threshold and no Λ; circuit volume, not code size, sets the exponent. Iceberg rotations are compiled non-fault-tolerantly, letting some single faults through D[673]. A threshold returns only when detection codes are concatenated and upper levels correct: Knill's C4/C6 scheme gave evidence for computing above 3% error per gate S[718], and concatenated iceberg codes suppress post-selection by raising the distance D[105].

Best demonstrated as of 2026-09-26: Helios' 94 iceberg-detected logical qubits D[105]. Dominant term: acceptance, rarely printed beside the headline.

Nothing is fabricated for detection; its supply chain is the host machine's. Connectivity decides the code: on heavy-hex, [[4,2,2]] uses flag qubits — extra ancillas that catch faults spreading out of a syndrome circuit D[716]; iceberg's global parity checks suit all-to-all ion traps D[673]; spacetime checks are searched for under whatever connectivity the chip has D[717].

Detection needs syndrome bits, not a decoder in the loop: discarding can follow the run, so there is no latency budget unless preparation is adaptive D[716]. Wukong read its stabilisers from the final data measurement alone, with no mid-circuit readout D[720]. The burden is shots: injection on ibm_fez kept 36.28(9)% of runs, ~2.8 runs per state D[721]; QPU time grows as e^(pN) S.

Slot 7 of three architectures: Transmon lattice with tunable couplers; Trapped ions — QCCD (transport between zones); Trapped ions — linear Paul trap with individual laser addressing. It requires syndrome measurement (dispersive readout on transmons). It provides post-selected logical states and gates, a first rehearsal of transversal logic D[720], and the discard stage of magic-state preparation: ibm_fez injection gave |H_L⟩ 0.8806(2) and |T_L⟩ 0.8665(3), above the 0.854 and 0.827 distillation thresholds D[721]. It is replaced by the rotated surface code — correction instead of detection. Algorithmic fault tolerance takes nothing further: its guarantee is exponential in distance S[152].

The register lists twelve carriers, seven primary and five alternate. The superconducting ones are all primary. IBM Quantum Heron r2 D[721], IBM Quantum Heron r3 (ibm_pittsburgh) D[46], Origin Wukong (3rd gen) D[720] and the IQM six-qubit star QPU (Deneb-class), 0.25(2)–0.91(3)% logical error per [[4,2,2]] cycle D[488], match their evidence; Origin Wukong 102 is listed by inference from the Wukong paper. IBM Quantum Falcon r5.11 is carried by the [[4,2,2]] magic state on ibm_peekskill D[716], not by its distance-3 subsystem code, decoded by matching with only leakage post-selected (4.37–4.91% of shots per round) — correction D[722]. Rigetti Ankaa-2 is not a carrier: its 8-qubit stability experiment was decoded in real time, with no post-selection reported D[723]. The alternates are ion machines: System Model H1 (H1-1), for the iceberg run on H1-2 D[673], and Helios D[105]; the iceberg run on H2-1 (up to 20 logical qubits) D[724] is not listed. A quantum-dot spin device is primary too: HRL exchange-only silicon spin processor (18 EO qubits from 54 quantum dots). This answers gap G-detect7: transmon slot 7 listed only correcting codes, while what shipped was detection.

Every headline here is conditional on acceptance: Harper & Flammia's 0.60(3)% is logical RB inside the code space D[719]; Wukong's gates and the ibm_fez states are post-selected D[720]D[721]. Acceptance belongs beside every fidelity, and the physical baseline deserves the same discard. Microsoft and Quantinuum report correction and detection on the same codes, 11× to 800× below physical baselines D[667]. Detection can also certify: IBM's spacetime-coded sampling bounds fidelity from syndrome statistics, device-dependent but under weaker assumptions than proxy benchmarks D[46] — fidelity, not hardness: version 1's 70-qubit circuit (bound 0.284) was simulated classically in 37.3 min on 256 H100 GPUs, log-XEB 0.350 D[47]; version 3 (2026-09-02) reports 76 physical qubits and a bound of 0.349 D[46].

Not published: the acceptance rate of Helios' 94-logical-qubit iceberg runs.

Money. No dated financial item is specific to error-detection codes as of 2026-09-26; they are paid for inside machine and research budgets.

Market & supply chain. Nobody sells detection; vendors sell QPU time, which detection multiplies by 1/acceptance. It pays into G2 — IBM reports lower sampling overhead than error mitigation D[717] — and into G3 only as rehearsal and state-preparation discard.

IP & standards. No detection-specific patent family or reporting standard found as of 2026-09-26; the codes are published D[673]S[710].

Roadmaps & track record. No vendor roadmap sets a detection milestone. Quantinuum moved from distance-2 iceberg (2024) to distance-4 concatenated iceberg (2026) within one code family D[673]D[105].

Strategic reading. Detection is the honest NISQ-to-QEC step: encoding, fault-tolerant preparation and logical gates at a stated discard cost, no scaling claimed. It favours platforms whose fidelity keeps pN small — the largest runs are on ions D[105] — and gives transmon vendors a compiler-level route to better G2 circuits. It undercuts only reporting that calls a distance-2 block a fault-tolerant logical qubit.

Confirm if by 2027-12-31 a detection-certified sampling run holds a fidelity bound above 0.3 on a circuit no published classical method reproduces within a week; demote to history if by 2028-12-31 magic-state preparation and utility circuits on transmons and ions run with correction, not discard. Open questions. (1) Where do detection and probabilistic error cancellation cross in sampling cost at 100–150 qubits? (2) How much gain survives a baseline given the same leakage discard? (3) Can spacetime checks leave the Clifford regime, where valid checks thin out exponentially D[717]? (4) What acceptance do Helios' 94-qubit iceberg runs keep at depth? (5) Is concatenated detection a cheaper route to early fault tolerance on 2D chips than surface-code memories?