Ion shuttling (QCCD, junctions, grid traps) cx_qccd

QCCD, proposed by Kielpinski, Monroe and Wineland in 2002 D[499], splits the register into zones and uses time-varying electrode voltages to move ions between memory and interaction zones, so no chain need be both long and gate-able — routing bought with trap area. Junctions make it two-dimensional; grid traps permute ions like a sliding-tile puzzle.

Mobility and time: the carrier itself moves, at 1.7–4 m/s measured D[114], [117], so connectivity is a schedule, not a coupler map; move-plus-re-cool ~2 ms, entangling determinism inapplicable. Error and fabrication: coherent motional excitation plus ion loss, seen as raised two-qubit infidelity and leakage; MEMS surface-electrode chips on DC waveforms.

Ramping neighbouring segment voltages drags a potential well, and its ion, along the axis — and the move need not be slow: NIST moved ⁹Be⁺ 370 µm in 8 µs, excitation peaking at 1.6 quanta and returning to 0.2 by waveform design D[500]. The millisecond cost is therefore not the hop but splitting and recombining crystals (two ions split in 55 µs kept ~2 quanta each D[500]) and the sideband cooling that restores the gate modes.

At a junction the rf null is discontinuous: the ion crosses a pseudopotential bump with excess micromotion, which sets transit speed and heating. Beneath that is anomalous heating from electrode-surface noise, steep as the ion nears the surface, so tighter confinement cannot buy adiabaticity. What moves the floor is a gate tolerant of a warm crystal: the electronic (laser-free, microwave-driven) gate reached 8.4×10⁻⁵ error without ground-state cooling D[102], deleting the re-cool term rather than shrinking it.

The gap between primitive and product is the finding: a Helios two-qubit gate takes ~70 µs against ~55 ms per layer, and on H2 transport was ~60% of runtime D[97], [110]. The dominant term is the schedule — sorting, split/merge, re-cooling, serialisation across eight zones.

Traps are segmented-electrode chips. Honeywell is Quantinuum's captive fab and made Sol's 2D grid chip, in validation as of Q2 2026 C[124]. Infineon Villach is the merchant line — 6–12 inch wafers, Generation-3 out-of-plane electrodes claimed to raise confinement ~10× — serving Oxford Ionics, eleQtron, Innsbruck and ETH at once C[320]. IonQ broke that duopoly by buying SkyWater for ~$1.8 B, closed 2026-07-31: the first ion vendor to own fabrication G[19]. Sandia's MESA stays research-only G[501]. No yield figure is public; the only price is AQT's EUR 9.8 M 20-qubit turnkey system, ≈ EUR 0.5 M per qubit C[323]. Single points of failure: Infineon's one line, and UV lasers, where TOPTICA dominates and 369 nm for Yb⁺ is constrained P[322]. No ECCN names ion traps, but a finished machine falls under 4A906, effective 2024-09-06 G[301].

A move is a synchronised DC waveform across tens of electrodes at µs update, then cooling and, for laser gates, beam re-addressing. Helios carries 1,228 electrodes for 98 ions D[97]: electrode count is what scales, and updates fit three orders inside the 55 ms layer, so electronics is not the wall. At 10³ ions it is ~10⁴ filtered DC channels, which Oxford Ionics would cut to ~200 external sources by putting switching electronics on-chip — a design study, no chip built S[325]. At 10⁴–10⁶ the constraint is routing cooling and gate light to many zones at once (Helios needs ≥7 wavelengths): none drives more than a few dozen concurrently.

Shuttling serves two of the three trapped-ion architectures — QCCD (Quantinuum), where it is primary, and electronic qubit control (IonQ/Oxford Ionics, eleQtron), where it is the alternate — providing the arbitrary-pair connectivity that bivariate bicycle qLDPC memories and high-rate transversal codes assume: Quantinuum's [[80,48,4]] demonstration pays for it in transport, while IonQ's qLDPC break-even ran on a static 40-ion chain without it. It replaces the static long chain, whose mode spectrum crowds as ions are added; the price is that connectivity becomes scheduling and the clock moves from gate to move — derived clock = sum of the syndrome round: gate layers + transport + readout + reset ≈ 9.7 ms, transport 9.0 ms of it, against the measured ~55 ms full-width layer D[97]. Neighbouring empty slot: more than two linked modules — the two-module link exists D[117], nothing larger.

Transport has no stand-alone benchmark. It is inferred from sideband thermometry around a move — the 0.013(1)–0.030(2) quanta figures D[114] — and from two-qubit fidelity after a transport sequence, which folds transport into gate error. Neither captures cumulative heating over a deep circuit, junction loss at scale, or zone crosstalk. The 55 ms layer and 2.5 kHz exchange rate are vendor-reported and externally unreplicated as of 2026-09-04; AQT's quantum volume 32,768 is not a transport measurement and discloses no timing C[128].

The EUR 0.5 M per qubit figure is a 2023 turnkey system price, not a chip cost. Not published: the grid-site count of the grid trap [113]; AQT LYNX's architecture (junction or linear-only) and its transport and gate times; and the yield, uniformity or per-die cost of any ion-trap fab line.

Who.
| Organisation | Role | Country | What they do here | Evidence |
|---|---|---|---|---|
| Quantinuum | developer | US/UK | Ring-junction QCCD, grid trap for Sol | D[97] |
| Honeywell | supplier | US | Captive fab, made Sol's chip | C[124] |
| IonQ | developer | US | Junction traps, owns SkyWater | G[19] |
| Infineon | supplier | AT | Merchant trap foundry, Gen-3 | C[320] |
| Universal Quantum | developer | UK | Only chip-to-chip matter link | D[117] |
| AQT | developer | AT | LYNX module, units Q4 2026; architecture undisclosed | C[128] |
| Quantum Art | developer | IL | Optical ion-array reconfiguration | P[125] |

Money. 2022-11-02 · Universal Quantum · DLR contract · EUR 67 M · undelivered P[328]. 2025-09-04 · Quantinuum · round · $600 M at $10 B pre-money · NVentures, Quanta, QED, JPMorgan · closed G[122]. 2025-11-06 · Quantinuum and IonQ · QBI Stage B · ≤$15 M each · active fact. 2026-05-05 · eleQtron · Series A · EUR 57 M G[129]. 2026-06-03 · Quantinuum · IPO · $1.68 B gross, Nasdaq QNT, cash $2.1 B G[124]. 2026-07-31 · IonQ · SkyWater M&A · ~$1.8 B, after Oxford Ionics at $1.075 B G[18], [19].

Market & supply chain. Trap fabrication was one captive plus one merchant line; SkyWater adds a vertically integrated third — the year's most consequential supply-chain event C[320]G[19]. UV lasers stay the harder chokepoint P[322]. Shuttling is paid for by G2 and is prerequisite to G3 and G4.

IP & standards. No shuttling-specific family count is published. Nearest dated: IonQ filed 9+ trapped-ion families across JP/EP/IL in 2025–26; Quantum Art holds two pending IL/KR patents on optical reconfiguration of ion arrays P[375]. No open-source shuttling stack exists.

Roadmaps & track record. Quantinuum: Helios (promised 2024-09-10, launched 2025-11-05 — met); Sol (2027, chip in validation Q2 2026 — on track); Apollo (2029 — unscored) R[118]C[124]; credible. IonQ: 10,000 physical on one chip by 2027, 2 M by 2030, no published 2D-trap heating or transport data, and a 2020 roadmap that missed 4,000 qubits by ~40× — intent, not plan R[132]. Universal Quantum has delivered nothing since 2022 P[502].

Strategic reading. Cut layer time 10× and ions convert a fidelity lead into throughput-competitive fault tolerance; fail, and they win logical-qubit headlines while losing on shots per second. Winners either way: Infineon and Honeywell, who sell the scarce object. Substitution threat: neutral-atom tweezers and superconducting long-range couplers — connectivity with no transport.

Confirm/demote in 12–24 months: Sol ships in 2027 with a published per-layer time; any vendor publishes a full-width layer below 10 ms; Universal Quantum links more than two modules. Best case 2029: sub-10 ms layers put the ion logical clock within ~10× of superconducting. Worst case: layer time stays within 2× of 55 ms and ions stay a platform that demonstrates codes rather than running algorithms. Open: does anomalous heating force cryogenic traps at 10⁴ ions; can split/merge be made quanta-free by optimal control; do warm-crystal gates delete re-cooling; does a second merchant fab appear. Watch: Sol validation, Infineon capacity, IonQ's first SkyWater trap.