Apollo
Apollo
Register profile — the machine's variant of its architecture
qubit type: hyperfine clock qubit
gate mechanism: laser Molmer-Sorensen; millions of logical operations
connectivity: QCCD 2-D array in standard CMOS fabrication; all-to-all connectivity, low crosstalk, MCM + qubit reuse
control: room-temperature electronics
control placement: room-temp + optics
readout: fluorescence
gate evidence: a published figure (source class not yet tagged)
decoder mode: planned — named in a roadmap only
codes: c4_helix
flags: a target, not a device
Technologies by layer — the machine's cell per layer
| 1 Qubit carrier | Trapped atomic ion · primary ▥ §What is Apollo? (ion trap chip; thousands of physical qubits) ✅ hyperfine clock qubit ions; thousands of physical qubits, hundreds of logical qubits (PLANNED, ~2030) |
| 2 Encoding | |
| 3 Gate mechanism | Mølmer–Sørensen / light-shift laser gate · primary ▥ §What is Apollo? (physical error 10⁻⁴; logical better than 10⁻⁶) ✅ laser Mølmer–Sørensen; physical error 10⁻⁴; logical error better than 10⁻⁶, potentially 10⁻¹⁰; millions of logical operations (targets) |
| 4 Connectivity / transport | Ion shuttling (QCCD, junctions, grid traps) · primary ▥ §What is Apollo? (2D array of trapping locations; all-to-all connectivity) ✅ QCCD 2-D array in standard CMOS fabrication; all-to-all connectivity, low crosstalk, MCM + qubit reuse (planned) |
| 5 Control | Laser control with integrated photonics (ions) · primary ▥ §What is Apollo? (controlled using standard CMOS electronics) ✅ room-temperature electronics + optics (register); no control detail in the roadmap |
| 6 Readout | Fluorescence state detection (ions, defects) · primary ▥ §What is Apollo? (mid-circuit measurement and qubit re-use) ✅ fluorescence; mid-circuit measurement + qubit reuse (planned) |
| 7 Code | High-rate concatenated codes with transversal gates · primary ▥ §What is Apollo? (high-rate and high-distance QEC codes) ✅ Helix generalised: high-rate concatenated codes for hundreds of logical qubits (planned) Magic-state factory (cultivation / distillation / code switching) · alternate ▥ ✅ heterogeneously paired with dedicated magic-state-distillation codes for universality (planned) |
| 8 Decoder | |
| 9 Interconnect | |
| 10 Manufacturing | 300 mm CMOS foundry (spins, cryo-CMOS, superconducting wiring) · primary ▥ §What is Apollo? (trap chip fabricated using standard CMOS processing) ✅ 2-D QCCD trap array in standard CMOS fabrication (planned) Ion-trap fabrication (surface-electrode chips; machined 3D blade traps) · alternate ◌ 🔎 alternate: surface-electrode ion-trap microfabrication as on Helios |
evidence: ✅ 8 / 12