Bosonic concatenation (repetition-cat, LDPC-cat, GKP+qLDPC) code_bosonic

The construction shapes the inner qubit's noise so the outer code has less to do. A cat qubit stabilised by two-photon dissipation suppresses bit-flips exponentially in photon number while phase-flips grow only linearly, so a 1D repetition code suffices: distance d costs d cats, not d². A GKP inner qubit instead hands up an analogue shift syndrome that a qLDPC outer code decodes with soft information. Theory came first and is precise. Gouzien et al. (PRL 131, 040602, 2023) size a repetition-cat machine at 126,133 cats, 19 photons each, for a 256-bit elliptic-curve logarithm in 9 hours at an assumed loss ratio of 10⁻⁵ S[95]; Ruiz et al. then gave 2D-local LDPC-cat codes, 758 cats for 100 logical qubits at ≤10⁻⁸ per cycle, assuming ~0.1% phase-flip S[96].
Attributes: partly fabricated (0.75); static, no control channel or readout of its own; biased plus Gaussian error — "Outer code exploits inner bias/shift correction; Ocelot d=3→5 nearly flat; LDPC-cat assumes 0.1% phase-flip (measured ~10%)" (graph record).

The family trades one error channel against another, and the exchange rate is the noise bias. Photon number buys exponential bit-flip suppression and pays linearly in phase-flips, so an architecture picks the point where bit-flips fall below the outer code's reach and lives with the rate left — assumed near 10⁻³. Hardware is not there: in Ocelot's CX at |α|² = 2 the phase-flip is 9.6(4)×10⁻² and the bit-flip 3.5(4)×10⁻³, a bias above 25 under the gate and above 30 idle D[80] — a per-CX figure, not per cycle. The deeper limit: bias belongs to the idle manifold and a dissipative CX degrades the asymmetry the code is built on, so the open problem is a bias-preserving gate, not a better memory. What moves the floor: a larger ratio of two-photon dissipation to single-photon loss, and unitary rather than dissipative gates.

One hardware result with a measured logical error carries the family: Ocelot (Putterman et al., AWS and Caltech, Nature 638, 927, 2025-02-26), a repetition code over five cat qubits with four ancilla transmons and five buffer modes — logical error 1.75(2)% at distance 3 and 1.65(3)% at distance 5, per 2.8 µs cycle D[80]. These are not the same operating point (d=3 at |α|² = 1, d=5 at |α|² = 1.5), so the repeated "flat below threshold" mixes a distance step with a photon-number step and scaling is not isolated. No bias-preserving cat–cat CNOT exists — the AWS-affiliated proposal is unitary and simulated S[81] — and no GKP-plus-qLDPC hardware exists. The register lists two more code runs on hardware, neither with a published logical error rate: Alice & Bob Helium (on-premise system), 18 cats as one logical qubit, and Aurora, a distance-2 repetition code on a GKP cluster state, detection only.

No process step of its own: this is an architecture and a decoder, and the graph record leaves fabrication unset. It inherits the cat or GKP host, and the superconducting hosts differ by builder. Yale's GKP oscillator is a seamless coaxial-stub cavity of high-purity aluminium with a tantalum transmon ancilla on a sapphire chip Dfact; Nord Quantique's is a double-post cavity of high-purity aluminium with an auxiliary transmon D[82]. AWS's Ocelot holds its cats in tantalum resonators on one die, bump-bonded to a second die that carries the aluminium junctions, and adds an ancilla transmon per repetition check — four for five cats D[80]. Alice & Bob's cats are tantalum-on-sapphire circuits with no transmon at all: two-photon dissipation through a buffer mode stabilises them, and the buffer also carries the readout factCfact. All four run in a dilution refrigerator. The accounting worth keeping is Ocelot's fourteen engineered elements for five data cats — the real denominator behind any "fewer qubits" comparison D[80]. Helium draws about 40 kW for a logical qubit using as few as 18 cats C[87]. No code-specific export control exists; ECCN 3A904 applies to the host G[301].

The decoder is the cheap part: a 1D repetition syndrome stream is simpler than 2D matching and, at 2.8 µs, inside existing FPGA decoders. The cost moved into analogue stabilisation — each cat needs a two-photon dissipation drive and a buffer pump, plus readout (through the buffer at Alice & Bob, through an ancilla transmon per check on Ocelot), so lines per data qubit exceed a bare transmon's. The saving is in code distance, not wiring: at 10³ cats the cryostat resembles a 10³-transmon machine with extra pumps. The cycle is also 2.5× slower than a 1.1 µs surface-code cycle D[1].

The code requires a biased cat or a GKP inner qubit; as the terminal outer layer it has no dependents, and it replaces fusion-based discrete-variable fault tolerance. It sits on two architectures, as the primary code on both: bosonic cavity qubits with cat and GKP encodings (Alice & Bob, AWS, Nord Quantique) and continuous-variable photonic GKP, where Xanadu concatenates GKP under qLDPC Cfact. Switching inner qubits is no re-parameterisation: the cat branch buys a 1D outer code and owes a bias-preserving gate; the GKP branch buys an analogue syndrome and owes ~10 dB of squeezing. Its derived-clock contribution (= sum of the syndrome round: gate layers + transport + readout + reset) is d₂ = 2 gate layers, a 1.44 µs round against the measured 2.8 µs cycle D[80]. The neighbouring empty slot is an LDPC-cat memory on hardware — unbuilt as of 4 Sep 2026.

The "100–1000× fewer qubits" claim is a resource estimate, not a measurement, and both papers state the assumption plainly: ~0.1% phase-flip S[95], [96]; hardware is at 9.6×10⁻² per CX D[80]. No protocol captures gate-level bias preservation under load, because the gate does not exist; Ocelot has no independent replication and mixes operating points across its distance comparison. Helium is sold but publishes no logical-performance data, and the roadmap quotes a September 2025 peak bit-flip time of 252 minutes against a 44-minute mean for the same run C[412].

No LDPC-cat or GKP-plus-qLDPC code has run on hardware. Not published: a dated patent-family count specific to bosonic codes, and AWS's funding for the Ocelot programme.

Who.
| Organisation | Role | Country | What exactly they do | Evidence |
|---|---|---|---|---|
| AWS | Developer | US | Ocelot repetition-cat hardware; cat–cat CNOT proposal | D[80] |
| Alice & Bob | Developer | FR | Cat hardware; Graphene repetition-cat roadmap | C[412] |
| Nord Quantique | Developer | CA | GKP inner qubits for an outer code | D[82] |
| Xanadu | Developer | CA | Optical GKP under qLDPC, roadmap stage | Rfact |
| D-Wave | Developer | US | Bosonic gate-model roadmap after buying Quantum Circuits | Cfact |

Money.

• 2025-01-28 · Alice & Bob · Series B · €100 M · NVentures extension 2026-05-22, undisclosed · closed Cfact
• 2025-11-06 · DARPA · QBI Stage B: Nord Quantique and Xanadu in, Alice & Bob not · ≤$15 M each · closed fact
• 2026-01-20 · D-Wave · acquisition of Quantum Circuits · $550 M ($300 M stock, $250 M cash) · closed Cfact
• 2026-05-18 · Nord Quantique · growth equity · $30 M at a $1.4 B valuation · closed Cfact

Market & supply chain. Nobody sells this layer; it is bundled into machines with a superconducting bill of materials, so concentration risk sits with amplifier and refrigerator vendors, not foundries. G3 and G4 pay for it indirectly: what customers buy is the qubit-count claim, which is why GENCI's June 2026 Helium purchase precedes any published logical-performance number Cfact.

IP & standards. No dated, code-specific patent-family count was found in any named database. The constructions are academic and openly published, so defensible IP sits in the stabilisation circuits — buffer design, two-photon dissipation, bias-preserving gates — not the codes. No standards activity found.

Roadmaps & track record. Alice & Bob (as of 2026-09-04): Helium, 12–18 cats and one logical qubit at 10⁻², current; then 48, 250 and finally 2,000 cats for 100 logical at 10⁻⁶ in 2030, with a stated 13-minute bit-flip requirement R[412]. D-Wave (2026-06-01): 10 logical in 2030, 100 in 2032, Λ = 10 Rfact. Xanadu: fault tolerance 2028–29 Rfact. Every roadmap is in logical qubits while the demonstrated quantity is one at 10⁻²; AWS publishes no dated roadmap and holds the only scaling data.

Strategic reading. This family is the bosonic companies' only argument against better-funded transmon incumbents: close the phase-flip gap and they leapfrog on qubit count per dollar. Fail, and qLDPC-on-transmon or dual-rail erasure takes the slot without needing an unproven bias-preserving gate.

Confirm or demote within 12–24 months: a demonstrated bias-preserving cat–cat CNOT; a distance scan at fixed photon number; any LDPC-cat or GKP-plus-qLDPC hardware result. Best case by 2029: a repetition-cat logical qubit with isolated below-threshold scaling and a measured bias-preserving gate, making the 758-cat estimate arguable. Worst case: phase-flip stays near 10⁻¹ and the family survives as a research line. Open: whether bias survives any two-qubit gate.