Aurora
Aurora
Register profile — the machine's variant of its architecture
qubit type: GKP grid states in optical modes + squeezed vacuum
gate mechanism: Gaussian beamsplitters/squeezers + homodyne measurement with feed-forward; measurement-based
connectivity: time-domain-multiplexed CV cluster state; 86.4 billion modes entangled across chips over 2 hours of continuous operation
control: electro-optic modulators + real-time feed-forward at the 1 MHz clock
control placement: room-temp electro-optic
readout: homodyne (quadrature) detection with a shared local-oscillator phase reference; PNR detection heralds GKP states
gate evidence: no published figure
decoder mode: feed-forward — the decoder's result acts inside the run (closed loop)
codes: gkp, gkp-cluster-state, quantum_repetition
flags: detection only, loss dominated
Technologies by layer — the machine's cell per layer
| 1 Qubit carrier | Squeezed light mode (CV) · primary ▣ Fig. 2 (sources chips); Fig. 1 (GBS cells); Methods: Sources array ✅ squeezed vacuum from 24 SiN source chips: 84 squeezers in 42 GBS cells, feeding GKP state generation (Jan 2025) |
| 2 Encoding | GKP grid encoding · primary ▣ Fig. 1 (architecture layout: GBS → refinery breeding) ✅ GKP grid states in optical modes; effective on-chip GKP squeezing 0.62 dB vs ~10 dB FT requirement |
| 3 Gate mechanism | CV Gaussian gates + GKP-assisted non-Gaussian operations · primary ▣ Fig. 3c,d (adaptive homodyne basis with feed-forward); Fig. 1 (QPU) ✅ Gaussian beamsplitters/squeezers + homodyne measurement with feed-forward; measurement-based on a CV cluster state |
| 4 Connectivity / transport | Photonic switching / routing (electro-optic, feed-forward) · primary ▣ Fig. 3a,b (12-mode macronode cluster, 86.4 billion modes) ✅ time-domain-multiplexed CV cluster state; 86.4 billion modes entangled across chips over 2 h continuous operation; switch loss 0.19 dB/MZI |
| 5 Control | Electro-optic drive + feed-forward electronics (room temperature) · primary ▣ Fig. 2 (four-rack system modules); Extended Data Fig. 1 (hardware block diagram) ✅ room-temp electro-optic modulators + real-time feed-forward at the 1 MHz clock; four server racks |
| 6 Readout | Homodyne quadrature detection (CV) · primary ▣ Fig. 2 (QPU homodyne detection); Methods: QPU array ✅ homodyne (quadrature) detection with a shared local-oscillator phase reference — the computational primitive of the CV machine Single-photon detection (SNSPD / TES) · alternate ▣ Fig. 2 (cryogenic PNR array); Methods: PNR detection system ✅ PNR detection used only to herald GKP states; not the readout coordinate of the CV machine |
| 7 Code | Bosonic concatenation (repetition-cat, LDPC-cat, GKP+qLDPC) · primary ▣ Fig. 3c,d (decoder-driven repetition-code checks); §Experiment ✅ gkp-cluster-state: foliated d=2 repetition code on a GKP CV cluster, real-time decoded — detection only, no Λ, no distance scan (Jan 2025) |
| 8 Decoder | MWPM / Sparse Blossom (+ correlated matching) · primary ▣ Fig. 3c,d; Fig. 2 (real-time decoder feedback) ✅ real-time, in-loop decoding at the 1 MHz clock (<1 µs per cycle), d=2 — the only in-loop decoder in photonics Relay-BP for qLDPC (FPGA) · alternate ▨ 🔎 roadmap only: decoder for the GKP ⊗ qLDPC code layer; not demonstrated |
| 9 Interconnect | Fibre links between photonic modules · primary ▣ Fig. 2 (fibre cabling and delay modules across racks) ✅ inter-rack fibre, 13 km of fibre interconnect across 35 chips; facet coupling 0.085 dB/facet |
| 10 Manufacturing | Photonic IC foundry (SiN, BTO, TFLN, SNSPD on 300 mm) · primary ▤ Methods: Sources array; Refinery array; QPU array ✅ 35 chips: 24 SiN source chips + 6 TFLN refinery chips + 5 Si-photonic QPU chips; SiN and TFLN photonic foundry, packaging in-house |
Standard records
code rate k/n → 1.0e+6 Hz · typical (clock)
Jan 2025 · source
decode latency per round → 1.0 µs · best (real-time decoding at the 1 MHz clock)
the only in-loop decoder in photonics · Jan 2025 · source
feed-forward latency → 1.0 µs · typical (one clock cycle)
Jan 2025 · source
evidence: ✅ 11 / 12