Advantage3

Raveh Neeman

doi:10.5281/zenodo.22674814

D-Wave Quantum · quantum annealers · PLANNED (20,000-qubit system available 2029; 100,000 qubits by 2031) (2029) · 20000 physical qubits · access: n/a

architecture: Quantum annealer — flux qubits · Open on the map

Register profile — the machine's variant of its architecture

qubit type: flux qubit (annealing lineage)

gate mechanism: quantum annealing (multi-chip annealing architecture)

connectivity: not published; multi-chip fabric joined by superconducting interconnects

control: scalable I/O prototype: a 100,000-qubit system with no more than 20% more I/O lines than the 4,500-qubit Advantage2

gate evidence: no published figure

flags: a target, not a device

Technologies by layer — the machine's cell per layer

1 Qubit carrier	rf-SQUID flux qubit (annealer) · primary ◌ 🔎 superconducting flux qubits (annealing lineage); not named in the Aug 2026 results
2 Encoding	— none — nothing in this layer ◌ 🔎 analog annealer has no encoding layer; the anneal architecture declares an empty L2
3 Gate mechanism	Quantum annealing (analogue evolution) · primary ▨ 'to scale the annealing architectures to multi-chip fabrics' ✅ annealing architecture scaled to multi-chip fabrics (D-Wave annealing roadmap, Aug 2026)
4 Connectivity / transport	— undisclosed — exists, nothing published ▨ 🔎 topology of the multi-chip fabric not published (Advantage2: Zephyr, 20-way)
5 Control	On-chip flux-DAC multiplexing · primary ▨ 'a new prototype for scalable I/O' 🔎 scalable I/O prototype: 100,000 qubits with no more than 20% more I/O lines than the 4,500-qubit Advantage2; mechanism not published (Advantage2 uses on-chip flux DACs)
6 Readout	Flux readout via QFP / SQUID shift registers (annealers) · primary ◌ 🔎 flux readout (annealer lineage); not described
7 Code	— none — nothing in this layer ◌ 🔎 annealer: no code
8 Decoder	— none — nothing in this layer ◌ 🔎 no decoder
9 Interconnect	Multi-chip modules / l-couplers (same cryostat) · primary ▨ 'packaging and superconducting interconnect technologies to scale the annealing architectures to multi-chip fabrics' ✅ multi-chip fabric: packaging and superconducting interconnects join QPU chips (20,000 qubits in 2029, 100,000 by 2031)
10 Manufacturing	Superconducting-qubit lithography (Al/AlOx/Al junctions, Nb wiring, 300 mm) · primary ◌ 🔎 superconducting flux-qubit chips (lineage); no fab detail published

evidence: ✅ 2 / 10