QSea I (DLR QCI ion-trap demonstrator)
eleQtron with NXP Semiconductors and ParityQC, for the DLR Quantum Computing Initiative
QSea I (DLR QCI ion-trap demonstrator)
architecture: Trapped ions — electronic qubit control (laser-free, microwave-driven gates) · Open on the map
Register profile — the machine's variant of its architecture
qubit type: trapped ion; species and qubit levels not stated by DLR, NXP or DCD (eleQtron's MAGIC line uses Yb-171 hyperfine qubits)
gate mechanism: MAGIC (Magnetic Gradient Induced Coupling): high-frequency pulses in the microwave range, qubits coupled by magnetic-field gradients
connectivity: all qubits coupled to one another by magnetic-field gradients
control: MAGIC microwave control (eleQtron); sensors and control and regulation electronics (NXP); ParityQC architecture
gate evidence: no published figure
flags: no published error rates
Technologies by layer — the machine's cell per layer
| 1 Qubit carrier | Trapped atomic ion · primary ▦ heading ('A 10-qubit quantum computer demonstrator based on ion trap technology') ✅ 10-qubit demonstrator based on ion-trap technology, DLR QCI Innovation Center, Hamburg |
| 2 Encoding | Hyperfine / clock-state qubit · primary ◌ 🔎 hyperfine qubit assumed from eleQtron's MAGIC line (Yb-171); species not stated for QSea I |
| 3 Gate mechanism | Electronic microwave gate (ions, laser-free: near-field or static gradient) · primary ▦ MAGIC paragraph ('MAGIC stands for Magnetic Gradient Induced Coupling') ✅ MAGIC: qubits steered by high-frequency pulses in the microwave range, coupled by magnetic-field gradients; no gate fidelity published |
| 4 Connectivity / transport | Ion-chain motional bus (all-to-all in chain) · primary ▦ 'All qubits are coupled to one another using magnetic field gradients' ✅ all ten qubits coupled to one another through magnetic-field gradients (all-to-all in the ion string) |
| 5 Control | Chip-integrated microwave control (ions) · primary ▦ MAGIC paragraph; NXP contribution paragraph ✅ microwave control by MAGIC hardware; NXP sensors and control and regulation electronics for embedding in classical computers |
| 6 Readout | Fluorescence state detection (ions, defects) · primary ◌ 🔎 fluorescence readout (family-determined); not described for QSea I |
| 7 Code | — none — nothing in this layer ▦ 🔎 no QEC code run; ParityQC architecture cited only for future error-corrected machines |
| 8 Decoder | |
| 9 Interconnect | — none — nothing in this layer ▨ 🔎 single MAGIC processor; connecting several processors is the goal of QSea II |
| 10 Manufacturing | Ion-trap fabrication (surface-electrode chips; machined 3D blade traps) · primary ▨ 🔎 ion-trap chip; fabrication route not published (NXP contributes chip design and technology) |
evidence: ✅ 4 / 10