Advantage2

Raveh Neeman

doi:10.5281/zenodo.22674814

D-Wave Quantum · quantum annealers · DEPLOYED (20 May 2025) · 4500 physical qubits · access: cloud (Leap) + on-prem sold

architecture: Quantum annealer — flux qubits · Open on the map

Register profile — the machine's variant of its architecture

qubit type: rf-SQUID flux qubit, sixth-generation annealing processor

gate mechanism: coherent quenches 3.6-27 ns on 1,222-5,627 qubits (not in the cited releases); Multicolor Annealing and Fast-Reverse Anneal added Jan 2026

connectivity: Zephyr, 20-way

control: on-chip flux DAC multiplexing - ~300 bias lines in total, ~200 multiplexed lines addressing the DAC network, for ~1e4 qubits (0.02-0.03 control lines per qubit); ~12.5 kW system power; multi-year cryogenic uptimes

control placement: on-chip flux DAC

readout: QFP / SQUID flux readout through on-chip shift registers

gate evidence: no published figure

codes: qac

flags: annealer reference only, cryogenic details missing, claim rebutted

Technologies by layer — the machine's cell per layer

1 Qubit carrier	rf-SQUID flux qubit (annealer) · primary ▤ §Experimental testbed (ADV2 prototype: 1,222 qubits, lower-noise process, Zephyr, 12 mK) ✅ rf-SQUID flux qubit, sixth-generation annealing processor; 4,400+ qubits, 40,000+ couplers; GA 20 May 2025; 2× coherence, 4× lower noise vs Advantage
2 Encoding	— none — nothing in this layer ◌ 🔎 analog annealer has no encoding layer; the anneal architecture declares an empty L2
3 Gate mechanism	Quantum annealing (analogue evolution) · primary ▣ §Quantum annealing (Methods); Fig. 1 (sampling post-quench states); Fig. 5 (ta = 7 ns and 20 ns) ✅ analog anneal; Multicolor Annealing (mid-anneal projection) and Fast-Reverse Anneal added 27 Jan 2026; coherent quenches 3.6–27 ns on 1,222–5,627 q (Atlas g_anneal)
4 Connectivity / transport	Long-range on-chip couplers (c-couplers, mm-scale) · primary ▣ §Zephyr Graph; figures 'Couplers in the Zephyr topology', 'Unit cell in the Zephyr topology' ✅ Zephyr topology, degree 20; 40,000+ couplers
5 Control	On-chip flux-DAC multiplexing · primary ▣ Fig. 3–5 (Φ-DAC schematic, SFQ sources); Fig. 8 (XYZ addressing); §III.E XYZ-addressing line count ✅ on-chip flux-DAC multiplexing: ~300 bias lines, ~200 multiplexed DAC lines for ~10⁴ qubits (0.02–0.03 lines/qubit); ~12.5 kW; multi-year cryo uptimes (Jan 2026)
6 Readout	Flux readout via QFP / SQUID shift registers (annealers) · primary ▦ §Advantage2_system1 (readout time range; readout error rate) 🔎 Advantage2_system1 readout time 17–101 µs (one qubit to full QPU), readout error ≤ 0.001; mechanism not named on the page (QFP shift registers shown for Advantage, arXiv:2108.02322) Dispersive microwave readout (+TWPA, Purcell) · alternate ◌ 🔎 path-assigned ro_disp describes transmon readout, not annealer readout; actual is QFP/SQUID flux readout
7 Code	— (Atlas gap: ∅G-qac) · primary ▤ abstract; device section ✅ penalty-spin and stacked quantum annealing correction on Advantage2_system1.10 (sweep 7 Oct 2026, source read)
8 Decoder	— none — nothing in this layer ▦ 🔎 no decoder; QEC not applicable
9 Interconnect	— none — nothing in this layer ◌ 🔎 monolithic single QPU, no interconnect; no machine-specific source
10 Manufacturing	Superconducting-qubit lithography (Al/AlOx/Al junctions, Nb wiring, 300 mm) · primary ▤ §Experimental testbed ('ADV2 was fabricated using a lower-noise process') ✅ superconducting flux-qubit lithography (in-house D-Wave process not published); no machine-specific fab source

Standard records

connectivity degree → 20 neighbours · best (Zephyr)

May 2025 · source

control lines per qubit → 0.03 lines/qubit · best (~300 bias lines for ~1e4 qubits)

the most transferable piece of D-Wave engineering · Jan 2026 · source

evidence: ✅ 6 / 11

Pictures

Every picture carries the story of what it shows and its credit line.

A data plot in two panels: coloured maps showing whether a quantum-annealer run behaves as a refrigerator, engine or accelerator, plotted against the annealing parameter and the starting temperature. It comes from the paper arXiv 2608.04564 by Pawłowski, Deffner, Mzaouali and co-authors, using D-Wave Advantage2 data per the caption. It shows analog annealing evolution used as a tunable thermal machine; notice how the boundaries move with the annealing parameter. “Fig. 9 — Figure 9: Advantage2 operating mode maps for two dimensional RAU and CBFM instances. The thermodynamic label is shown in the (β1,sp)(,s) plane for…” by Jakub Pawłowski, Tomasz Śmierzchalski, Fengping Jin, Bartłomiej Gardas, Sebastian Deffner, Zakaria Mzaouali, arxiv.org/abs/2608.04564, CC BY 4.0 (creativecommons.org/licenses/by/4.0/)

Fig. 1 — Fig. 1: The PUD model and its solution using theory and quantum annealing.a The PUD model is an Ising model with a tunable degree of frustration. De… — Four-panel figure about a frustrated Ising magnet studied on a quantum annealer. Panel (a) draws the model, a square lattice whose vertical bonds alternate between two strengths set by a parameter s; (b) is the exact phase diagram with ferromagnetic, antiferromagnetic and paramagnetic regions; (c) and (d) are maps of the two order parameters measured from annealer samples, which follow the same regions. From Nature Communications (2026), Fig. 1, by Sathe, King, Nisoli, Caravelli and co-authors; per the caption the samples came from D-Wave's Advantage2_prototype2.6 device on a 12×12 torus. It shows analog quantum annealing used as a sampler of classical critical behaviour. “Fig. 1 — Fig. 1: The PUD model and its solution using theory and quantum annealing.a The PUD model is an Ising model with a tunable degree of frustration. Defined on a…” by Sathe et al., www.nature.com/articles/s41467-025-67568-w, CC BY 4.0 (creativecommons.org/licenses/by/4.0/)