Lucy

Raveh Neeman

doi:10.5281/zenodo.22674814

Quandela · photonics · DEPLOYED (Oct 2025 (launched on Joliot-Curie 14 Apr 2026)) · 12 physical qubits · access: on-prem at CEA TGCC / EuroHPC

architecture: Fusion-based photonic (FBQC) · Open on the map

Register profile — the machine's variant of its architecture

qubit type: single photon from a semiconductor quantum dot in a micropillar cavity

gate mechanism: post-selected/heralded linear-optical two-qubit gates

connectivity: reconfigurable interferometer mesh

control: electro-optic control

control placement: room-temp electro-optic

readout: SNSPD

gate evidence: no published figure

flags: no published error rates, source not confirmed

Technologies by layer — the machine's cell per layer

1 Qubit carrier	Single photon (discrete variable) · primary ▦ 🔎 single photons from a semiconductor quantum-dot micropillar source, demultiplexed into many modes; qubit count bounded by source brightness ÷ demux loss
2 Encoding	Time-bin / path photonic encoding · primary ▦ 🔎 path/time-bin-encoded single-photon qubits from one demultiplexed QD source; 12 qubits (delivered CEA TGCC Oct 2025) Dual-rail (erasure) encoding · alternate ▦ 🔎 dual-rail path encoding (Quandela also uses polarisation encodings)
3 Gate mechanism	Linear-optical fusion (heralded) · primary ▦ 🔎 post-selected/heralded linear-optical 2Q gates, not FBQC fusion; launched on Joliot-Curie HPC 14 Apr 2026; published fidelities exist only for Ascella
4 Connectivity / transport	Photonic switching / routing (electro-optic, feed-forward) · primary ▦ 🔎 reconfigurable linear-optical interferometer mesh fed by the demultiplexed QD source
5 Control	Electro-optic drive + feed-forward electronics (room temperature) · primary ▦ 🔎 electro-optic control, room temperature; on-prem HPC-integrated at CEA TGCC (Joliot-Curie)
6 Readout	Single-photon detection (SNSPD / TES) · primary ▦ 🔎 SNSPD single-photon detection
7 Code	— none — nothing in this layer ▦ 🔎 no QEC demonstrated; no code family named for the 50-logical-by-2028 roadmap milestone
8 Decoder	— none — nothing in this layer ▦ 🔎 no decoder published; compilers and decoders dedicated to error correction scheduled for 2027
9 Interconnect	Fibre links between photonic modules · alternate ◌ 🔎 alternate only: no fibre inter-module link published — none — nothing in this layer ◌ 🔎 no inter-module photonic link published; single module
10 Manufacturing	III-V MBE heterostructures (InAs–Pb wires, QD sources) · alternate ◌ 🔎 GaAs quantum-dot single-photon source (III-V heterostructure) Photonic IC foundry (SiN, BTO, TFLN, SNSPD on 300 mm) · alternate ◌ 🔎 SiN/silica interferometer meshes (photonic IC); foundry not stated — (Atlas gap: ∅G-twofab) · primary ◌ 🔎 needs two L10 nodes: SiN/silica interferometer meshes (fab_pic) plus GaAs quantum-dot source (fab_mbe); the Atlas allows one

evidence: ✅ 0 / 14