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QC2026 Dual Core

SaxonQ

QC2026 Dual Core

SaxonQ · defect spins · DEMONSTRATED (unveiled and run under operating conditions at Hannover Messe, Apr 2026; third-generation mobile system) (Apr 2026) · 10 physical qubits

Register profile — the machine's variant of its architecture

qubit type: NV-centre spin in diamond
gate mechanism: not published for this system; SaxonQ: spins 'steered with microwave-frequency gates'
connectivity: two parallel 5-qubit cores; no inter-core link described
control: room-temperature operation from a standard wall outlet, no cryogenics; optical initialisation and readout, microwave gates (SaxonQ)
control placement: room temperature
readout: optical spin readout (SaxonQ platform statement)
gate evidence: no published figure
flags: no published error rates, press sources only

Technologies by layer — the machine's cell per layer

1 Qubit carrier
Colour-centre / defect spin (NV, SiV, SnV, T centre) · primary ▨ SaxonQ paragraph ('two parallel NV diamond processors at 5 qubits per core') ✅
two parallel NV-diamond processors, 5 qubits per core (Hannover Messe, Apr 2026)
2 Encoding
Single-spin (Loss–DiVincenzo) / nuclear-spin encoding · primary ◌ 🔎
NV spin qubits (family-determined); encoding not described
3 Gate mechanism
Microwave / optical spin gates (defect centres, 1Q spins) · primary ▦ 🔎
microwave-frequency spin gates (SaxonQ platform statement; not restated for QC2026)
4 Connectivity / transport
Static nearest-neighbour lattice · primary ◌ 🔎
local register within each 5-qubit core (family-determined); intra-core coupling not described
5 Control
— (Atlas gap: ∅G-nvroom) · primary ▨ 🔎
room-temperature optical initialisation and microwave control from a standard wall outlet, no cryogenics
6 Readout
Fluorescence state detection (ions, defects) · primary ▦ 🔎
optical spin readout (SaxonQ platform statement)
7 Code
— none — nothing in this layer ▨ 🔎
no QEC reported
8 Decoder
— none — nothing in this layer ◌ 🔎
no decoder
9 Interconnect
— none — nothing in this layer ▨ 🔎
two parallel 5-qubit processors; no inter-core link described (parallel cores are not an interconnect)
10 Manufacturing
Diamond growth / implantation (NV, SiV, SnV) · primary ◌ 🔎
NV centres in diamond (family-determined); no fab detail published
evidence: ✅ 1 / 10