OQC TITAN
OQC TITAN
Register profile — the machine's variant of its architecture
qubit type: multi-mode superconducting qubit (dual-rail Dimon lineage)
gate evidence: no published figure
flags: a target, not a device
Technologies by layer — the machine's cell per layer
| 1 Qubit carrier | Transmon · primary ▥ 🔎 multi-mode superconducting qubit of the Dimon (transmon) lineage; 2,000 lattice sites (2028) — (Atlas gap: ∅G-dimon) · alternate ▥ TITAN card ('multi-mode qubits') ✅ roadmap names 'multi-mode qubits' for TITAN — the Dimon's multimode single-device dual rail |
| 2 Encoding | Dual-rail (erasure) encoding · primary ▥ 🔎 dual-rail encoding of the Dimon lineage (GENESIS: 'dual-rail-encoded logical qubit'); not restated for this system |
| 3 Gate mechanism | |
| 4 Connectivity / transport | |
| 5 Control | Vertical (out-of-plane) signal delivery — VIO, coaxmon, 3D wiring · primary ◌ 🔎 OQC's out-of-plane Coaxmon control lineage; not stated for this system |
| 6 Readout | Mid-circuit erasure check · primary ◌ 🔎 error-detected dual-rail readout (GENESIS lineage); not stated for this system |
| 7 Code | — undisclosed — exists, nothing published ▥ TITAN card ('quantum error correction code concatenation') ✅ 'quantum error correction code concatenation' named; code family not published; 200 logical qubits over 2,000 sites at 1e-6 |
| 8 Decoder | — undisclosed — exists, nothing published ▥ 🔎 no decoder published for the 1e-6, 1 MHz logical target |
| 9 Interconnect | — undisclosed — exists, nothing published ▥ TITAN card ('wafer-level packaging') ✅ 'wafer-level packaging that supports thousand-qubit scaling' named; no module or link architecture published |
| 10 Manufacturing | Superconducting-qubit lithography (Al/AlOx/Al junctions, Nb wiring, 300 mm) · primary ▥ TITAN card ('100 mm') ✅ superconducting processor at 100 mm scale with wafer-level packaging |
evidence: ✅ 4 / 11