A four-panel figure of renders, not photographs: the Tanner graph of the [[18,4,4]] bivariate bicycle code on a torus, a layout of the 32-qubit superconducting processor Kunlun (18 data and 14 check qubits), a 10 µm inset of two couplers crossing, plus error, timing and circuit panels. From "Demonstration of low-overhead quantum error correction codes" by Ke Wang, Zhide Lu and co-authors. It shows how a qLDPC code that needs non-local connections is laid out on a flat chip with long-range couplers that cross over one another.“Fig. 1 — Fig. 1: Implementation of the bivariate bicycle code. a, Schematic of the Kunlun processor. (Upper left) Tanner graph of the bivariate bicycle (BB) code…” by Ke Wang et al., arxiv.org/abs/2505.09684, CC BY 4.0 (creativecommons.org/licenses/by/4.0/)
